-- this line and following will be ignored JTAG Connector Signal Assignment SIGNAL PIN ROW* SIGNAL A B VCC 2 1 VTref GND 4 3 /TRST GND 6 5 TDI GND 8 7 TMS GND 10 9 TCK GND 12 11 RTCK GND 14 13 TDO GND 16 15 /RESET GND 18 17 NC GND 20 19 NC SIGNAL PIN ROW SIGNAL A B VCC 2 1 VTref GND 4 3 /TRST GND 6 5 TDI GND 8 7 TMS GND 10 9 TCK GND 12 11 RTCK GND 14 13 TDO GND 16 15 /RESET GND 18 17 NC GND 20 19 NC RTCK TMS /TRST TDO TCK TDI Standard 20-Pin JTAG Connector VTref - 1 2 - Vsupply nTRST - 3 4 - GND TDI - 5 6 - GND TMS - 7 8 - GND TCK - 9 10 - GND RTCK - 11 12 - GND TDO - 13 14 - GND nSRST - 15 16 - GND DBGRQ - 17 18 - GND DBGACK - 19 20 - GND http://www.voti.nl/winkel/catalog.html?CON-LCONTRA-17x2 INVERTER, HEX SCHMITT http://www.interfacebus.com/Design_Connector_JTAG_Bus.html page 374 - user.manual.lpc3180.01.pdf Table 418. Debug pins on LPC3180/01 Pin name Description Alternate function I/O type Reset state Pin detail JTAG1_TCK ARM Jtag clock - I Input -[1] JTAG1_RTCK ARM Jtag return clock - O Low - JTAG1_NTRST ARM Jtag reset - I Input pullup[2] JTAG1_TMS ARM Jtag mode select - I Input pullup JTAG1_TDI ARM Jtag data in - I Input pullup JTAG1_TDO ARM Jtag data out - O Low - Total pins: 6 [1] This pin has a pullup on the LPC3180. [2] This pin has a pulldown on the LPC3180. [3] General note: Inputs from JTAG emulators may have strong drivers. It is recommended to add termination resistors on the PCB.