v 20081231 1 C 40000 40000 0 0 0 title-bordered-A3.sym T 49300 40900 8 10 1 1 0 0 1 data=2008-08-21 / 2009-07-21 T 53200 40600 8 10 1 1 0 0 1 rev=v0.1.7j T 49300 40600 8 10 1 1 0 0 1 fname=../openarm/jtag.sch T 52200 41150 8 10 1 1 0 0 1 auth=Jelle de Jong T 49300 40300 8 10 1 1 0 0 1 page=03 T 50800 40300 8 10 1 1 0 0 1 pages=14 T 48800 41150 8 10 1 1 0 0 1 tiltle=OpenARM SBC JTAG Design T 52200 41400 8 10 1 1 0 0 1 company=PowerCraft Technology T 52200 40900 8 10 1 1 0 0 1 licence=GPLv3 T 53250 40300 8 10 1 1 0 0 1 project=OpenARM SBC Project C 49900 47900 1 0 0 resistor-2.sym { T 50300 48250 5 10 0 0 0 0 1 device=MC 0.1W 0805 1% 100R T 50100 48200 5 10 1 1 0 0 1 refdes=R302 T 50100 47800 5 10 1 1 0 2 1 value=100 T 49900 47900 5 10 0 1 0 0 1 footprint=0805 } C 49900 44700 1 0 0 resistor-2.sym { T 50300 45050 5 10 0 0 0 0 1 device=MC 0.1W 0805 1% 100R T 50100 45000 5 10 1 1 0 0 1 refdes=R306 T 50100 44600 5 10 1 1 0 2 1 value=100 T 49900 44700 5 10 0 1 0 0 1 footprint=0805 } C 49900 45500 1 0 0 resistor-2.sym { T 50300 45850 5 10 0 0 0 0 1 device=MC 0.1W 0805 1% 100R T 50100 45800 5 10 1 1 0 0 1 refdes=R305 T 50100 45400 5 10 1 1 0 2 1 value=100 T 49900 45500 5 10 0 1 0 0 1 footprint=0805 } C 49900 46300 1 0 0 resistor-2.sym { T 50300 46650 5 10 0 0 0 0 1 device=MC 0.1W 0805 1% 100R T 50100 46600 5 10 1 1 0 0 1 refdes=R304 T 50100 46200 5 10 1 1 0 2 1 value=100 T 49900 46300 5 10 0 1 0 0 1 footprint=0805 } C 49900 47100 1 0 0 resistor-2.sym { T 50300 47450 5 10 0 0 0 0 1 device=MC 0.1W 0805 1% 100R T 50100 47400 5 10 1 1 0 0 1 refdes=R303 T 50100 47000 5 10 1 1 0 2 1 value=100 T 49900 47100 5 10 0 1 0 0 1 footprint=0805 } N 51500 46750 51300 46750 4 N 51300 46750 51300 48000 4 N 51300 48000 50800 48000 4 N 51500 46450 51150 46450 4 N 51150 46450 51150 47200 4 N 51150 47200 50800 47200 4 N 51500 45850 51000 45850 4 N 51000 45850 51000 45600 4 N 51000 45600 50800 45600 4 N 51500 46150 51000 46150 4 N 51000 46150 51000 46400 4 N 51000 46400 50800 46400 4 N 51500 45550 51150 45550 4 N 51150 45550 51150 44800 4 N 51150 44800 50800 44800 4 C 49900 43900 1 0 0 resistor-2.sym { T 50300 44250 5 10 0 0 0 0 1 device=MC 0.1W 0805 1% 100R T 50100 44200 5 10 1 1 0 0 1 refdes=R307 T 50100 43800 5 10 1 1 0 2 1 value=100 T 49900 43900 5 10 0 1 0 0 1 footprint=0805 } N 51500 45250 51300 45250 4 N 51300 44000 51300 45250 4 N 51300 44000 50800 44000 4 N 48700 44000 49900 44000 4 { T 49400 44050 5 10 1 1 0 6 1 netname=\_TRST\_ } N 48700 44800 49900 44800 4 { T 49400 44850 5 10 1 1 0 6 1 netname=TDI } N 48700 46400 49900 46400 4 { T 49400 46450 5 10 1 1 0 6 1 netname=RTCK } N 48700 45600 49900 45600 4 { T 49400 45650 5 10 1 1 0 6 1 netname=TCK } N 48700 47200 49900 47200 4 { T 49400 47250 5 10 1 1 0 6 1 netname=TMS } N 48700 48000 49900 48000 4 { T 49400 48050 5 10 1 1 0 6 1 netname=TDO } C 44900 49400 1 0 0 output-1.sym { T 44900 49400 5 10 0 0 0 0 1 net=nonbuf_nRSTB:1 T 45800 49500 5 10 1 1 0 1 1 value=\_nonbuf_RSTB\_ } C 43800 49400 1 0 0 resistor-2.sym { T 44200 49750 5 10 0 0 0 0 1 device=MC 0.1W 0805 1% 100R T 44000 49700 5 10 1 1 0 0 1 refdes=R301 T 44000 49300 5 10 1 1 0 2 1 value=100 T 43800 49400 5 10 0 1 0 0 1 footprint=0805 } N 42800 49500 43800 49500 4 { T 43500 49550 5 10 1 1 0 6 1 netname=\_SRST\_ } N 44700 49500 44900 49500 4 T 48700 41500 8 10 1 0 0 0 2 source=/home/jelle/openarm/doc/JTAG/information.txt C 51500 44650 1 0 0 LPC3180-JTAG.sym { T 54200 47150 5 10 1 1 0 6 1 block=JTAG T 51800 47150 5 10 1 1 0 0 1 device=LPC3180FEL320 T 51800 47350 5 10 0 1 0 0 1 footprint=BGA320N50P4X4_1300X1300X90__NXP_LPC3180FEL320_SOT824 T 51800 47450 5 10 1 1 0 0 1 refdes=U001 } C 43600 44200 1 0 0 2-1634688-0.sym { T 44900 48900 5 10 0 0 0 0 1 device=2-1634688-0 T 43900 47900 5 10 0 1 0 0 1 footprint=CON_HDR-254P-2R-20N-10C__TYCO_1634688_Series T 43900 47900 5 10 1 1 0 0 1 refdes=J301 } N 42800 45400 43600 45400 4 { T 43500 45450 5 10 1 1 0 6 1 netname=\_SRST\_ } N 43600 45700 42800 45700 4 { T 43500 45750 5 10 1 1 0 6 1 netname=TDO } N 43600 47200 42800 47200 4 { T 43500 47250 5 10 1 1 0 6 1 netname=\_TRST\_ } N 43600 46900 42800 46900 4 { T 43500 46950 5 10 1 1 0 6 1 netname=TDI } N 43600 46600 42800 46600 4 { T 43500 46650 5 10 1 1 0 6 1 netname=TMS } N 43600 46300 42800 46300 4 { T 43500 46350 5 10 1 1 0 6 1 netname=TCK } N 43600 46000 42800 46000 4 { T 43500 46050 5 10 1 1 0 6 1 netname=RTCK } N 43600 47500 42800 47500 4 { T 43500 47550 5 10 1 1 0 6 1 value=VTref } N 42800 47500 42800 48400 4 N 45200 47200 45400 47200 4 N 45200 46900 45400 46900 4 N 45200 46600 45400 46600 4 N 45200 46300 45400 46300 4 N 45200 46000 45400 46000 4 C 45900 48600 1 0 0 generic-power.sym { T 46100 48850 5 10 1 1 0 3 1 net=+3.125V:1 } C 46300 46300 1 90 0 capacitor-1.sym { T 45600 46500 5 10 0 0 90 0 1 device=GRM21BR71H104KA01L T 45800 46500 5 10 1 1 90 0 1 refdes=C301 T 45400 46500 5 10 0 0 90 0 1 symversion=0.1 T 46300 46300 5 10 0 0 90 0 1 footprint=0805 T 46400 46500 5 10 1 1 90 2 1 value=100nF } N 46100 47200 46100 48600 4 C 46000 45800 1 0 0 gnd-1.sym N 46100 46300 46100 46100 4 N 45200 47500 46100 47500 4 { T 45300 47550 5 10 1 1 0 0 1 value=Vsupply } N 42800 48400 46100 48400 4 C 45300 44300 1 0 0 gnd-1.sym N 45200 44800 45400 44800 4 N 45200 45700 45400 45700 4 N 45200 45400 45400 45400 4 N 45200 45100 45400 45100 4 N 45400 44600 45400 47200 4 C 42300 45000 1 0 0 nc-left-1.sym { T 42300 45400 5 10 0 0 0 0 1 value=NoConnection T 42300 45800 5 10 0 0 0 0 1 device=DRC_Directive } C 42300 44700 1 0 0 nc-left-1.sym { T 42300 45100 5 10 0 0 0 0 1 value=NoConnection T 42300 45500 5 10 0 0 0 0 1 device=DRC_Directive } N 43600 44800 42800 44800 4 { T 43500 44850 5 10 1 1 0 6 1 value=NC } N 43600 45100 42800 45100 4 { T 43500 45150 5 10 1 1 0 6 1 value=NC }