Subversion Repositories OpenARM Single-board Computer

Rev

Rev 219 | Rev 262 | Go to most recent revision | Details | Compare with Previous | Last modification | View Log | RSS feed

Rev Author Line No. Line
102 jelle 1
v 20080127 1
2
C 40000 40000 0 0 0 title-bordered-A3.sym
174 jelle 3
T 49400 40900 8 10 1 1 0 0 1
4
data=2008-08-13
5
T 53300 40600 8 10 1 1 0 0 1
6
rev=v0.1.2j
7
T 49400 40600 8 10 1 1 0 0 1
8
fname=../openarm/power-on-reset.sch
9
T 52300 41150 8 10 1 1 0 0 1
10
auth=Jelle de Jong <jelledejong@powercraft.nl>
11
T 49400 40300 8 10 1 1 0 0 1
12
page=02
13
T 50900 40300 8 10 1 1 0 0 1
14
pages=20
15
T 48800 41150 8 10 1 1 0 0 1
16
tiltle=OpenARM SBC Power On Design
17
T 52300 41400 8 10 1 1 0 0 1
18
company=PowerCraft Technology
19
T 52300 40900 8 10 1 1 0 0 1
20
licence=GPLv3
21
T 53350 40300 8 10 1 1 0 0 1
22
project=OpenARM SBC Project
115 jelle 23
C 41900 48900 1 0 0 input-1.sym
102 jelle 24
{
115 jelle 25
T 41900 48900 5 10 0 0 0 0 1
102 jelle 26
net=+1.2V:1
115 jelle 27
T 41800 49000 5 8 1 1 0 7 1
102 jelle 28
value=+1.2V
29
}
115 jelle 30
C 41900 48200 1 0 0 input-1.sym
102 jelle 31
{
115 jelle 32
T 41900 48200 5 10 0 0 0 0 1
107 jelle 33
net=+3.125V:1
115 jelle 34
T 41800 48300 5 8 1 1 0 7 1
106 jelle 35
value=+3.125V
102 jelle 36
}
115 jelle 37
C 41900 47500 1 0 0 input-1.sym
102 jelle 38
{
115 jelle 39
T 41900 47500 5 10 0 0 0 0 1
106 jelle 40
net=+3.281V:1
115 jelle 41
T 41800 47600 5 8 1 1 0 7 1
106 jelle 42
value=+3.281V
102 jelle 43
}
115 jelle 44
N 42700 47600 42900 47600 4
45
N 42900 47600 42900 47800 4
46
N 42700 48300 42900 48300 4
47
N 42900 48300 42900 48500 4
48
N 42700 49000 42900 49000 4
49
N 42900 49000 42900 49200 4
50
C 42700 49200 1 0 0 generic-power.sym
102 jelle 51
{
115 jelle 52
T 42900 49450 5 8 1 1 0 3 1
102 jelle 53
net=+1.2V:1
54
}
115 jelle 55
C 42700 48500 1 0 0 generic-power.sym
102 jelle 56
{
115 jelle 57
T 42900 48750 5 8 1 1 0 3 1
102 jelle 58
net=+3.125V:1
59
}
115 jelle 60
C 42700 47800 1 0 0 generic-power.sym
102 jelle 61
{
115 jelle 62
T 42900 48050 5 8 1 1 0 3 1
102 jelle 63
net=+3.281V:1
64
}
115 jelle 65
C 47100 49200 1 90 0 resistor-2.sym
102 jelle 66
{
115 jelle 67
T 46750 49600 5 10 0 0 90 0 1
102 jelle 68
device=RESISTOR
115 jelle 69
T 46800 49400 5 10 1 1 90 0 1
102 jelle 70
refdes=R201
115 jelle 71
T 47200 49400 5 10 1 1 90 2 1
72
value=10k
73
T 47100 49200 5 10 0 1 90 0 1
102 jelle 74
footprint=0805
75
}
115 jelle 76
C 44700 47800 1 90 0 capacitor-1.sym
102 jelle 77
{
115 jelle 78
T 44000 48000 5 10 0 0 90 0 1
102 jelle 79
device=CAPACITOR
115 jelle 80
T 44200 48000 5 10 1 1 90 0 1
102 jelle 81
refdes=C201
115 jelle 82
T 43800 48000 5 10 0 0 90 0 1
102 jelle 83
symversion=0.1
115 jelle 84
T 44700 47800 5 10 0 0 90 0 1
102 jelle 85
footprint=0805
115 jelle 86
T 44800 48000 5 10 1 1 90 2 1
102 jelle 87
value=100nF
88
}
115 jelle 89
C 44300 49200 1 0 0 generic-power.sym
102 jelle 90
{
115 jelle 91
T 44500 49450 5 8 1 1 0 3 1
102 jelle 92
net=+3.125V:1
93
}
115 jelle 94
C 44400 47300 1 0 0 gnd-1.sym
95
C 45500 47800 1 0 0 gnd-1.sym
96
N 44700 48900 44500 48900 4
97
N 44500 48700 44500 49200 4
98
N 45600 48100 45600 48300 4
99
N 44500 47800 44500 47600 4
100
N 46500 48900 47000 48900 4
101
N 47000 46100 47000 49200 4
219 jelle 102
N 47900 48900 47000 48900 4
103
{
104
T 47900 48900 5 10 0 0 0 0 1
105
netname=nRSTA
106
T 47800 48950 5 10 1 1 0 6 1
107
value=\_aRST\_
108
}
115 jelle 109
N 47000 50100 47000 50300 4
110
C 44700 45000 1 90 0 capacitor-1.sym
102 jelle 111
{
115 jelle 112
T 44000 45200 5 10 0 0 90 0 1
102 jelle 113
device=CAPACITOR
115 jelle 114
T 44200 45200 5 10 1 1 90 0 1
102 jelle 115
refdes=C202
115 jelle 116
T 43800 45200 5 10 0 0 90 0 1
102 jelle 117
symversion=0.1
115 jelle 118
T 44700 45000 5 10 0 0 90 0 1
102 jelle 119
footprint=0805
115 jelle 120
T 44800 45200 5 10 1 1 90 2 1
102 jelle 121
value=100nF
122
}
115 jelle 123
C 44300 46400 1 0 0 generic-power.sym
102 jelle 124
{
115 jelle 125
T 44500 46650 5 8 1 1 0 3 1
102 jelle 126
net=+3.281V:1
127
}
115 jelle 128
C 44400 44500 1 0 0 gnd-1.sym
129
C 45500 45000 1 0 0 gnd-1.sym
130
N 44700 46100 44500 46100 4
131
N 44500 45900 44500 46400 4
132
N 45600 45300 45600 45500 4
133
N 44500 45000 44500 44800 4
134
N 46500 46100 47000 46100 4
102 jelle 135
T 48700 41900 9 10 1 0 0 0 5
136
There is no supervisory circuit for the +1.2V,
137
this is because I can't find a good and avalible IC.
115 jelle 138
I combine the supervisors on one reset line,
102 jelle 139
and hope this gives engough reliabilty.
140
Please see the documentation for more info.
115 jelle 141
C 45700 43000 1 90 0 resistor-2.sym
142
{
143
T 45350 43400 5 10 0 0 90 0 1
144
device=RESISTOR
145
T 45400 43200 5 10 1 1 90 0 1
167 jelle 146
refdes=R203
115 jelle 147
T 45800 43200 5 10 1 1 90 2 1
148
value=10k
149
T 45700 43000 5 10 0 1 90 0 1
150
footprint=0805
151
}
152
C 45800 41200 1 90 0 capacitor-1.sym
153
{
154
T 45100 41400 5 10 0 0 90 0 1
155
device=CAPACITOR
156
T 45300 41400 5 10 1 1 90 0 1
157
refdes=C203
158
T 44900 41400 5 10 0 0 90 0 1
159
symversion=0.1
160
T 45800 41200 5 10 0 0 90 0 1
161
footprint=0805
162
T 45900 41400 5 10 1 1 90 2 1
163
value=100nF
164
}
165
C 44300 42500 1 0 0 resistor-2.sym
166
{
167
T 44700 42850 5 10 0 0 0 0 1
168
device=RESISTOR
169
T 44500 42800 5 10 1 1 0 0 1
167 jelle 170
refdes=R202
115 jelle 171
T 44500 42400 5 10 1 1 0 2 1
172
value=100
173
T 44300 42500 5 10 0 1 0 0 1
174
footprint=0805
175
}
176
C 42900 42600 1 0 0 switch-pushbutton-no-1.sym
177
{
178
T 43300 42900 5 10 1 1 0 0 1
179
refdes=S201
180
T 43300 43200 5 10 0 0 0 0 1
181
device=SWITCH_PUSHBUTTON_NO
182
}
183
C 42500 42000 1 0 0 gnd-1.sym
184
N 42900 42600 42600 42600 4
185
N 42600 42600 42600 42300 4
186
N 44300 42600 43900 42600 4
187
C 45400 44200 1 0 0 generic-power.sym
188
{
189
T 45600 44450 5 8 1 1 0 3 1
190
net=+3.281V:1
191
}
192
N 45200 42600 45600 42600 4
193
N 45600 42100 45600 43000 4
194
N 45600 43900 45600 44200 4
195
C 45500 40700 1 0 0 gnd-1.sym
196
N 45600 41000 45600 41200 4
167 jelle 197
C 53600 45900 1 0 0 output-1.sym
115 jelle 198
{
167 jelle 199
T 53600 45900 5 10 0 0 0 0 1
115 jelle 200
net=RESET_N:1
167 jelle 201
T 54500 46000 5 10 1 1 0 1 1
115 jelle 202
value=RESET_N
203
}
167 jelle 204
C 53300 46400 1 90 0 resistor-2.sym
115 jelle 205
{
167 jelle 206
T 52950 46800 5 10 0 0 90 0 1
115 jelle 207
device=RESISTOR
167 jelle 208
T 53000 46600 5 10 1 1 90 0 1
209
refdes=R204
210
T 53400 46600 5 10 1 1 90 2 1
115 jelle 211
value=5k
167 jelle 212
T 53300 46400 5 10 0 1 90 0 1
115 jelle 213
footprint=0805
214
}
167 jelle 215
N 53200 47500 53200 47300 4
219 jelle 216
N 45600 42600 46900 42600 4
115 jelle 217
{
219 jelle 218
T 46900 42600 5 10 0 0 0 0 1
219
netname=nRSTB
220
T 46800 42650 5 10 1 1 0 6 1
115 jelle 221
value=\_bRST\_
222
}
167 jelle 223
C 53000 47500 1 0 0 generic-power.sym
115 jelle 224
{
167 jelle 225
T 53200 47750 5 8 1 1 0 3 1
115 jelle 226
net=+1.2V:1
227
}
228
C 46800 50300 1 0 0 generic-power.sym
229
{
230
T 47000 50550 5 8 1 1 0 3 1
231
net=+3.281V:1
232
}
167 jelle 233
N 53200 46400 53200 46000 4
234
N 53600 46000 52800 46000 4
235
N 52800 45700 53200 45700 4
236
N 53200 45700 53200 46000 4
219 jelle 237
N 53000 49700 54500 49700 4
115 jelle 238
{
219 jelle 239
T 54500 49700 5 10 0 0 0 0 1
240
netname=nonbuf_nRSTA
241
T 54400 49750 5 10 1 1 0 6 1
242
value=\_nonbuf_aRST\_
115 jelle 243
}
158 jelle 244
C 44700 48300 1 0 0 MCP120-1.sym
245
{
246
T 45000 49300 5 10 1 1 0 0 1
247
device=MCP120/130
248
T 44995 50470 5 10 0 0 0 0 1
249
footprint=SOT23
250
T 44995 49495 5 10 1 1 0 0 1
251
refdes=U201
252
}
253
C 44700 45500 1 0 0 MCP120-1.sym
254
{
255
T 45000 46500 5 10 1 1 0 0 1
256
device=MCP120/130
257
T 44995 47670 5 10 0 0 0 0 1
258
footprint=SOT23
259
T 44995 46695 5 10 1 1 0 0 1
260
refdes=U202
261
}
167 jelle 262
T 53800 44600 9 10 1 0 0 0 4
263
INPUT OUTPUT
264
  A     Y
265
  L     L
266
  H     Z
267
C 53000 45200 1 0 0 generic-power.sym
268
{
269
T 53200 45450 5 8 1 1 0 3 1
270
net=+3.281V:1
271
}
272
C 53100 44400 1 0 0 gnd-1.sym
273
N 53200 45200 53200 45100 4
274
N 53200 45100 52800 45100 4
275
N 52800 44800 53200 44800 4
276
N 53200 44800 53200 44700 4
277
C 50300 44200 1 0 0 SN74LVC2G07.sym
278
{
279
T 50500 46400 5 10 1 1 0 0 1
280
device=SN74LVC2G07DBVR
281
T 50500 46600 5 10 1 1 0 0 1
282
footprint=SOT-DBV
283
T 50500 46800 5 10 1 1 0 0 1
284
refdes=U204
285
}
286
C 50300 48200 1 0 0 SN74LVC1G08.sym
287
{
288
T 50500 50100 5 10 1 1 0 0 1
289
device=SN74LVC1G08DBVRG4
290
T 50500 50300 5 10 1 1 0 0 1
291
footprint=SOT-DBV
292
T 50500 50500 5 10 1 1 0 0 1
293
refdes=U203
294
}
295
C 53200 49200 1 0 0 generic-power.sym
296
{
297
T 53400 49450 5 8 1 1 0 3 1
298
net=+3.281V:1
299
}
300
C 53300 48400 1 0 0 gnd-1.sym
301
N 53400 49200 53400 49100 4
302
N 53400 48800 53400 48700 4
303
N 53400 49100 53000 49100 4
304
N 53000 48800 53400 48800 4
219 jelle 305
T 50500 48200 9 10 1 0 0 0 1
306
Y = A * B or Y = \_A\_ + \_B\_
307
L 51900 48400 52000 48400 3 0 0 0 -1 -1
308
L 52450 48400 52000 48400 3 0 0 0 -1 -1
309
N 50300 49700 49600 49700 4
167 jelle 310
{
219 jelle 311
T 50300 49700 5 10 0 0 0 0 1
312
netname=nRSTA
313
T 50200 49750 5 10 1 1 0 6 1
314
value=\_aRST\_
167 jelle 315
}
219 jelle 316
N 50300 49400 49600 49400 4
167 jelle 317
{
219 jelle 318
T 50300 49400 5 10 0 0 0 0 1
319
netname=nRSTB
320
T 50200 49450 5 10 1 1 0 6 1
321
value=\_bRST\_
322
}
323
N 50300 46000 48900 46000 4
324
{
325
T 50300 46000 5 10 0 0 0 0 1
326
netname=nonbuf_nRSTA
327
T 50200 46050 5 10 1 1 0 6 1
328
value=\_nonbuf_aRST\_
329
}
330
C 49400 45600 1 0 0 input-1.sym
331
{
332
T 49400 45600 5 10 0 0 0 0 1
167 jelle 333
net=nonbuf_nRSTB:1
219 jelle 334
T 49300 45700 5 10 1 1 0 7 1
167 jelle 335
value=\_nonbuf_bRST\_
336
}
219 jelle 337
N 50300 45700 50200 45700 4