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Rev Author Line No. Line
208 jelle 1
v 20080127 1
2
C 40000 40000 0 0 0 title-bordered-A2.sym
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T 56100 40900 8 10 1 1 0 0 1
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data=2008-10-05
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T 60000 40600 8 10 1 1 0 0 1
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rev=v0.1.1j
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T 56100 40600 8 10 1 1 0 0 1
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fname=../openarm/lpc3180-power.sch
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T 59000 41150 8 10 1 1 0 0 1
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auth=Jelle de Jong <jelledejong@powercraft.nl>
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T 56100 40300 8 10 1 1 0 0 1
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page=12
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T 57600 40300 8 10 1 1 0 0 1
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pages=20
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T 55600 41150 8 10 1 1 0 0 1
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tiltle=OpenARM SBC LPC3180 Power
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T 59000 41400 8 10 1 1 0 0 1
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company=PowerCraft Technology
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T 59000 40900 8 10 1 1 0 0 1
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licence=GPLv3
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T 60050 40300 8 10 1 1 0 0 1
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project=OpenARM SBC Project
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C 57100 53500 1 0 0 LPC3180-VDD-12.sym
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{
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T 60400 54500 5 10 1 1 0 6 1
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block=VDD (12)
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T 57500 54500 5 10 1 1 0 0 1
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device=LPC3180FEL320
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T 57500 54700 5 10 1 1 0 0 1
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footprint=SOT824
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T 57500 54900 5 10 1 1 0 0 1
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refdes=U1205
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}
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C 42800 53300 1 0 0 LPC3180-VDD-AD28.sym
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{
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T 46300 54600 5 10 1 1 0 6 1
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block=VDD (AD28)
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T 43200 54600 5 10 1 1 0 0 1
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device=LPC3180FEL320
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T 43200 54800 5 10 1 1 0 0 1
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footprint=SOT824
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T 43200 55000 5 10 1 1 0 0 1
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refdes=U1201
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}
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C 44400 48000 1 0 0 LPC3180-VDD-IO.sym
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{
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T 47800 50800 5 10 1 1 0 6 1
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block=VDD (IO)
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T 44900 50800 5 10 1 1 0 0 1
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device=LPC3180FEL320
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T 44900 51000 5 10 1 1 0 0 1
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footprint=SOT824
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T 44900 51200 5 10 1 1 0 0 1
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refdes=U1203
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}
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C 47200 53600 1 0 0 LPC3180-VSS-AD.sym
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{
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T 50500 54600 5 10 1 1 0 6 1
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block=VSS (AD)
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T 47600 54600 5 10 1 1 0 0 1
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device=LPC3180FEL320
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T 47600 54800 5 10 1 1 0 0 1
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footprint=SOT824
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T 47600 55000 5 10 1 1 0 0 1
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refdes=U1202
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}
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C 55700 42400 1 0 0 LPC3180-VSS-CORE.sym
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{
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T 59300 45800 5 10 1 1 0 6 1
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block=VSS (CORE)
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T 56200 45800 5 10 1 1 0 0 1
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device=LPC3180FEL320
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T 56200 46000 5 10 1 1 0 0 1
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footprint=SOT824
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T 56200 46200 5 10 1 1 0 0 1
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refdes=U1208
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}
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C 52100 53000 1 0 0 LPC3180-VSS-gen.sym
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{
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T 54800 54600 5 10 1 1 0 6 1
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block=VSS
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T 52500 54600 5 10 1 1 0 0 1
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device=LPC3180FEL320
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T 52500 54800 5 10 1 1 0 0 1
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footprint=SOT824
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T 52500 55000 5 10 1 1 0 0 1
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refdes=U1204
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}
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C 56500 54300 1 0 0 generic-power.sym
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{
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T 56700 54550 5 8 1 1 0 3 1
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net=+1.2V:1
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}
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C 56900 53000 1 90 0 capacitor-1.sym
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{
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T 56200 53200 5 10 0 0 90 0 1
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device=CAPACITOR
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T 56400 53200 5 10 1 1 90 0 1
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refdes=C1216
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T 56000 53200 5 10 0 0 90 0 1
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symversion=0.1
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T 56900 53000 5 10 0 0 90 0 1
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footprint=0805
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T 57000 53200 5 10 1 1 90 2 1
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value=100nF
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}
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C 56600 52500 1 0 0 gnd-1.sym
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N 57100 54100 56700 54100 4
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N 56700 53900 56700 54300 4
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N 56700 53000 56700 52800 4
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C 42200 54400 1 0 0 generic-power.sym
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{
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T 42400 54650 5 8 1 1 0 3 1
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net=+3.125V:1
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}
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C 41600 53100 1 90 0 capacitor-1.sym
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{
118
T 40900 53300 5 10 0 0 90 0 1
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device=CAPACITOR
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T 41100 53300 5 10 1 1 90 0 1
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refdes=C1201
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T 40700 53300 5 10 0 0 90 0 1
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symversion=0.1
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T 41600 53100 5 10 0 0 90 0 1
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footprint=0805
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T 41700 53300 5 10 1 1 90 2 1
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value=100nF
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}
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N 41400 53100 41400 52600 4
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C 42600 52800 1 90 0 capacitor-1.sym
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{
132
T 41900 53000 5 10 0 0 90 0 1
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device=CAPACITOR
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T 42100 53000 5 10 1 1 90 0 1
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refdes=C1202
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T 41700 53000 5 10 0 0 90 0 1
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symversion=0.1
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T 42600 52800 5 10 0 0 90 0 1
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footprint=0805
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T 42700 53000 5 10 1 1 90 2 1
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value=100nF
142
}
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C 42300 52100 1 0 0 gnd-1.sym
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N 42400 52800 42400 52400 4
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N 42400 53700 42400 54400 4
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N 42800 53900 42400 53900 4
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N 42800 54200 42400 54200 4
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N 42400 54200 41400 54200 4
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N 41400 54200 41400 54000 4
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N 41400 52600 42400 52600 4
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C 51800 53100 1 0 0 gnd-1.sym
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N 52100 54200 51900 54200 4
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N 51900 54200 51900 53400 4
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N 52100 53900 51900 53900 4
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N 52100 53600 51900 53600 4
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C 46900 53700 1 0 0 gnd-1.sym
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N 47200 54200 47000 54200 4
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N 47000 54000 47000 54200 4
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C 50500 42100 1 0 0 LPC3180-VDD-CORE.sym
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{
161
T 54100 45800 5 10 1 1 0 6 1
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block=VDD (CORE)
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T 51000 45800 5 10 1 1 0 0 1
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device=LPC3180FEL320
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T 51000 46000 5 10 1 1 0 0 1
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footprint=SOT824
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T 51000 46200 5 10 1 1 0 0 1
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refdes=U1206
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}
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C 55800 47700 1 0 0 LPC3180-VSS-IO.sym
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{
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T 59200 50800 5 10 1 1 0 6 1
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block=VSS (IO)
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T 56300 50800 5 10 1 1 0 0 1
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device=LPC3180FEL320
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T 56300 51000 5 10 1 1 0 0 1
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footprint=SOT824
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T 56300 51200 5 10 1 1 0 0 1
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refdes=U1207
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}
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C 55400 42500 1 0 0 gnd-1.sym
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N 55700 43600 55500 43600 4
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N 55700 43300 55500 43300 4
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N 55700 43000 55500 43000 4
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C 55500 49300 1 0 0 gnd-1.sym
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N 55800 50400 55600 50400 4
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N 55600 50400 55600 49600 4
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N 55800 49800 55600 49800 4
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N 55700 43900 55500 43900 4
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N 55700 44200 55500 44200 4
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N 55700 44500 55500 44500 4
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N 55700 44800 55500 44800 4
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N 55700 45100 55500 45100 4
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N 55700 45400 55500 45400 4
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N 55500 42800 55500 45400 4
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C 49900 45600 1 0 0 generic-power.sym
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{
198
T 50100 45850 5 8 1 1 0 3 1
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net=+1.2V:1
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}
201
C 49300 41900 1 90 0 capacitor-1.sym
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{
203
T 48600 42100 5 10 0 0 90 0 1
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device=CAPACITOR
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T 48800 42100 5 10 1 1 90 0 1
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refdes=C1220
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T 48400 42100 5 10 0 0 90 0 1
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symversion=0.1
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T 49300 41900 5 10 0 0 90 0 1
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footprint=0805
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T 49400 42100 5 10 1 1 90 2 1
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value=100nF
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}
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N 49100 41900 49100 41400 4
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C 50300 41600 1 90 0 capacitor-1.sym
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{
217
T 49600 41800 5 10 0 0 90 0 1
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device=CAPACITOR
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T 49800 41800 5 10 1 1 90 0 1
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refdes=C1221
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T 49400 41800 5 10 0 0 90 0 1
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symversion=0.1
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T 50300 41600 5 10 0 0 90 0 1
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footprint=0805
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T 50400 41800 5 10 1 1 90 2 1
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value=100nF
227
}
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C 50000 40900 1 0 0 gnd-1.sym
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N 50100 41600 50100 41200 4
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N 50100 42500 50100 45600 4
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N 50500 42700 50100 42700 4
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N 50500 43000 50100 43000 4
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N 50100 43000 49100 43000 4
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N 49100 43000 49100 42800 4
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N 50500 43600 50100 43600 4
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N 50500 43900 50100 43900 4
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N 50500 44200 50100 44200 4
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N 50500 44500 50100 44500 4
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N 50500 44800 50100 44800 4
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N 50500 45100 50100 45100 4
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N 50500 45400 50100 45400 4
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N 50100 43600 48100 43600 4
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N 48100 43600 48100 43400 4
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C 48300 42500 1 90 0 capacitor-1.sym
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{
246
T 47600 42700 5 10 0 0 90 0 1
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device=CAPACITOR
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T 47800 42700 5 10 1 1 90 0 1
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refdes=C1219
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T 47400 42700 5 10 0 0 90 0 1
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symversion=0.1
252
T 48300 42500 5 10 0 0 90 0 1
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footprint=0805
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T 48400 42700 5 10 1 1 90 2 1
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value=100nF
256
}
257
C 47300 42800 1 90 0 capacitor-1.sym
258
{
259
T 46600 43000 5 10 0 0 90 0 1
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device=CAPACITOR
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T 46800 43000 5 10 1 1 90 0 1
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refdes=C1217
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T 46400 43000 5 10 0 0 90 0 1
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symversion=0.1
265
T 47300 42800 5 10 0 0 90 0 1
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footprint=0805
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T 47400 43000 5 10 1 1 90 2 1
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value=100nF
269
}
270
N 50100 43900 47100 43900 4
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N 47100 43900 47100 43700 4
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C 46300 43100 1 90 0 capacitor-1.sym
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{
274
T 45600 43300 5 10 0 0 90 0 1
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device=CAPACITOR
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T 45800 43300 5 10 1 1 90 0 1
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refdes=C1214
278
T 45400 43300 5 10 0 0 90 0 1
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symversion=0.1
280
T 46300 43100 5 10 0 0 90 0 1
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footprint=0805
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T 46400 43300 5 10 1 1 90 2 1
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value=100nF
284
}
285
N 50100 44200 46100 44200 4
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N 46100 44200 46100 44000 4
287
C 45300 43400 1 90 0 capacitor-1.sym
288
{
289
T 44600 43600 5 10 0 0 90 0 1
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device=CAPACITOR
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T 44800 43600 5 10 1 1 90 0 1
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refdes=C1210
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T 44400 43600 5 10 0 0 90 0 1
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symversion=0.1
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T 45300 43400 5 10 0 0 90 0 1
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footprint=0805
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T 45400 43600 5 10 1 1 90 2 1
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value=100nF
299
}
300
N 50100 44500 45100 44500 4
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N 45100 44500 45100 44300 4
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C 44300 43700 1 90 0 capacitor-1.sym
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{
304
T 43600 43900 5 10 0 0 90 0 1
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device=CAPACITOR
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T 43800 43900 5 10 1 1 90 0 1
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refdes=C1208
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T 43400 43900 5 10 0 0 90 0 1
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symversion=0.1
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T 44300 43700 5 10 0 0 90 0 1
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footprint=0805
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T 44400 43900 5 10 1 1 90 2 1
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value=100nF
314
}
315
N 50100 44800 44100 44800 4
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N 44100 44800 44100 44600 4
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C 43300 44000 1 90 0 capacitor-1.sym
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{
319
T 42600 44200 5 10 0 0 90 0 1
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device=CAPACITOR
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T 42800 44200 5 10 1 1 90 0 1
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refdes=C1207
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T 42400 44200 5 10 0 0 90 0 1
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symversion=0.1
325
T 43300 44000 5 10 0 0 90 0 1
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footprint=0805
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T 43400 44200 5 10 1 1 90 2 1
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value=100nF
329
}
330
N 43100 45100 43100 44900 4
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N 50100 45100 43100 45100 4
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C 42300 44300 1 90 0 capacitor-1.sym
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{
334
T 41600 44500 5 10 0 0 90 0 1
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device=CAPACITOR
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T 41800 44500 5 10 1 1 90 0 1
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refdes=C1206
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T 41400 44500 5 10 0 0 90 0 1
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symversion=0.1
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T 42300 44300 5 10 0 0 90 0 1
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footprint=0805
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T 42400 44500 5 10 1 1 90 2 1
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value=100nF
344
}
345
N 50100 45400 42100 45400 4
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N 42100 45400 42100 45200 4
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N 48100 42500 48100 41400 4
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N 47100 41400 47100 42800 4
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N 46100 41400 46100 43100 4
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N 45100 41400 45100 43400 4
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N 44100 41400 44100 43700 4
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N 43100 41400 43100 44000 4
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N 42100 41400 50100 41400 4
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N 42100 41400 42100 44300 4
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C 59800 47800 1 0 0 gnd-1.sym
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N 59700 48300 59900 48300 4
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N 59700 48600 59900 48600 4
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N 59700 48900 59900 48900 4
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N 59700 49200 59900 49200 4
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N 59700 49800 59900 49800 4
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N 59700 50100 59900 50100 4
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N 59700 50400 59900 50400 4
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N 59900 48100 59900 50400 4
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C 44000 50600 1 0 0 generic-power.sym
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{
366
T 44200 50850 5 8 1 1 0 3 1
367
net=+3.125V:1
368
}
369
C 44400 48400 1 90 0 capacitor-1.sym
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{
371
T 43700 48600 5 10 0 0 90 0 1
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device=CAPACITOR
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T 43900 48600 5 10 1 1 90 0 1
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refdes=C1205
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T 43500 48600 5 10 0 0 90 0 1
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symversion=0.1
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T 44400 48400 5 10 0 0 90 0 1
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footprint=0805
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T 44500 48600 5 10 1 1 90 2 1
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value=100nF
381
}
382
C 44100 47700 1 0 0 gnd-1.sym
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N 44200 50600 44200 49300 4
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N 44400 49500 44200 49500 4
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N 44400 50100 44200 50100 4
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N 44400 50400 44200 50400 4
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N 44200 48000 44200 48400 4
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C 43400 49000 1 90 0 capacitor-1.sym
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{
390
T 42700 49200 5 10 0 0 90 0 1
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device=CAPACITOR
392
T 42900 49200 5 10 1 1 90 0 1
393
refdes=C1204
394
T 42500 49200 5 10 0 0 90 0 1
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symversion=0.1
396
T 43400 49000 5 10 0 0 90 0 1
397
footprint=0805
398
T 43500 49200 5 10 1 1 90 2 1
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value=100nF
400
}
401
C 42400 49300 1 90 0 capacitor-1.sym
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{
403
T 41700 49500 5 10 0 0 90 0 1
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device=CAPACITOR
405
T 41900 49500 5 10 1 1 90 0 1
406
refdes=C1203
407
T 41500 49500 5 10 0 0 90 0 1
408
symversion=0.1
409
T 42400 49300 5 10 0 0 90 0 1
410
footprint=0805
411
T 42500 49500 5 10 1 1 90 2 1
412
value=100nF
413
}
414
N 44200 50400 42200 50400 4
415
N 42200 50400 42200 50200 4
416
N 44200 50100 43200 50100 4
417
N 43200 50100 43200 49900 4
418
N 43200 48200 43200 49000 4
419
N 42200 48200 44200 48200 4
420
N 42200 48200 42200 49300 4
421
C 48400 50600 1 0 0 generic-power.sym
422
{
423
T 48600 50850 5 8 1 1 0 3 1
424
net=+3.125V:1
425
}
426
C 48800 47500 1 90 0 capacitor-1.sym
427
{
428
T 48100 47700 5 10 0 0 90 0 1
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device=CAPACITOR
430
T 48300 47700 5 10 1 1 90 0 1
431
refdes=C1209
432
T 47900 47700 5 10 0 0 90 0 1
433
symversion=0.1
434
T 48800 47500 5 10 0 0 90 0 1
435
footprint=0805
436
T 48900 47700 5 10 1 1 90 2 1
437
value=100nF
438
}
439
C 48500 46800 1 0 0 gnd-1.sym
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N 48600 50600 48600 48400 4
441
N 48300 49500 48600 49500 4
442
N 48300 50100 48600 50100 4
443
N 48300 50400 48600 50400 4
444
N 48600 47100 48600 47500 4
445
N 48300 48600 48600 48600 4
446
N 48300 48900 48600 48900 4
447
N 48300 49800 48600 49800 4
448
C 49800 47800 1 90 0 capacitor-1.sym
449
{
450
T 49100 48000 5 10 0 0 90 0 1
451
device=CAPACITOR
452
T 49300 48000 5 10 1 1 90 0 1
453
refdes=C1211
454
T 48900 48000 5 10 0 0 90 0 1
455
symversion=0.1
456
T 49800 47800 5 10 0 0 90 0 1
457
footprint=0805
458
T 49900 48000 5 10 1 1 90 2 1
459
value=100nF
460
}
461
C 50800 48400 1 90 0 capacitor-1.sym
462
{
463
T 50100 48600 5 10 0 0 90 0 1
464
device=CAPACITOR
465
T 50300 48600 5 10 1 1 90 0 1
466
refdes=C1212
467
T 49900 48600 5 10 0 0 90 0 1
468
symversion=0.1
469
T 50800 48400 5 10 0 0 90 0 1
470
footprint=0805
471
T 50900 48600 5 10 1 1 90 2 1
472
value=100nF
473
}
474
C 51800 48700 1 90 0 capacitor-1.sym
475
{
476
T 51100 48900 5 10 0 0 90 0 1
477
device=CAPACITOR
478
T 51300 48900 5 10 1 1 90 0 1
479
refdes=C1213
480
T 50900 48900 5 10 0 0 90 0 1
481
symversion=0.1
482
T 51800 48700 5 10 0 0 90 0 1
483
footprint=0805
484
T 51900 48900 5 10 1 1 90 2 1
485
value=100nF
486
}
487
C 52800 49000 1 90 0 capacitor-1.sym
488
{
489
T 52100 49200 5 10 0 0 90 0 1
490
device=CAPACITOR
491
T 52300 49200 5 10 1 1 90 0 1
492
refdes=C1215
493
T 51900 49200 5 10 0 0 90 0 1
494
symversion=0.1
495
T 52800 49000 5 10 0 0 90 0 1
496
footprint=0805
497
T 52900 49200 5 10 1 1 90 2 1
498
value=100nF
499
}
500
C 53800 49300 1 90 0 capacitor-1.sym
501
{
502
T 53100 49500 5 10 0 0 90 0 1
503
device=CAPACITOR
504
T 53300 49500 5 10 1 1 90 0 1
505
refdes=C1218
506
T 52900 49500 5 10 0 0 90 0 1
507
symversion=0.1
508
T 53800 49300 5 10 0 0 90 0 1
509
footprint=0805
510
T 53900 49500 5 10 1 1 90 2 1
511
value=100nF
512
}
513
N 49600 47300 49600 47800 4
514
N 50600 47300 50600 48400 4
515
N 51600 47300 51600 48700 4
516
N 52600 47300 52600 49000 4
517
N 48600 47300 53600 47300 4
518
N 53600 47300 53600 49300 4
519
N 48600 48900 49600 48900 4
520
N 49600 48900 49600 48700 4
521
N 48600 49500 50600 49500 4
522
N 50600 49500 50600 49300 4
523
N 48600 49800 51600 49800 4
524
N 51600 49800 51600 49600 4
525
N 48600 50100 52600 50100 4
526
N 52600 50100 52600 49900 4
527
N 48600 50400 53600 50400 4
528
N 53600 50400 53600 50200 4