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Rev Author Line No. Line
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v 20060123 1
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uselicense=unlimited
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distlicense=GPL (v2 or any later version)
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copyright=2008 Tibor Palinkas
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author=Tibor Palinkas
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description=NXP 16/32-bit ARM926EJ-S microcontroller
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documentation=http://www.standardics.nxp.com/support/documents/microcontrollers/pdf/user.manual.lpc3180.01.pdf
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block=VDD (CORE)
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device=LPC3180FEL320
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footprint=SOT824
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refdes=U?
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{
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pinlabel=VDD_COREFXD12_02
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pinnumber=D18
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pinseq=D18
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}
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{
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pinlabel=VDD_CORE12_02
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pinnumber=D6
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pinseq=D6
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}
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{
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pinlabel=VDD_CORE12_03
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pinnumber=K21
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pinseq=K21
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}
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{
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pinlabel=VDD_CORE12_08
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pinnumber=AB18
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}
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{
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pinlabel=VDD_COREFXD12_01
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pinnumber=C10
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pinseq=C10
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}
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{
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pinlabel=VDD_CORE12_05
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pinnumber=L3
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pinseq=L3
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}
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{
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pinlabel=VDD_CORE12_07
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pinnumber=AB6
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}
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{
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pinlabel=VDD_CORE12_06
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pinnumber=AA12
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}
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{
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pinlabel=VDD_CORE12_01
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pinnumber=AA2
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pinseq=AA2
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}