Subversion Repositories OpenARM Single-board Computer

Rev

Rev 112 | Details | Compare with Previous | Last modification | View Log | RSS feed

Rev Author Line No. Line
92 jelle 1
Row A
2
1 U6_IRRX/PIO_INP[21]
3
2 U5_RX/PIO_INP[20]
4
3 HIGHCORE
5
4 JTAG1_TDO
6
5 JTAG1_TMS
7
6 JTAG1_RTCK
8
7 U3_TX
9
8 VSS
10
9 VSS
11
10 VSS_IO1828_02
12
11 GPO_23/U2_HRTS
13
12 GPI_05
14
13 RTCX_OUT
15
14 RTCX_IN
16
15 VSS
17
16 VDD28
18
17 VDD28
19
18 i.c.[1]
20
19 VDD28
21
20 VSS
22
21 VDD12
23
22 VDD_PLLHCLK_12
24
23 SYSX_IN
25
24 i.c.[1]
26
 
27
Row B
28
1 KEY_COL5
29
2 U7_HCTS/PIO_INP[22]
30
3 U7_TX
31
4 VDD_IO1828_02
32
5 JTAG1_TCK
33
6 JTAG1_TDI
34
7 VDD_IO1828_01
35
8 U2_HCTS/ PIO_INP[16]
36
9 U1_RX/PIO_INP[15]
37
10 U1_TX
38
11 VSS
39
12 GPO_17
40
13 VSS_RTCCORE
41
14 VDD12
42
15 VSS
43
16 VSS
44
17 i.c.[1]
45
18 i.c.[1]
46
19 VDD12
47
20 VSS_PLLUSB
48
21 VSS_OSC
49
22 VDD_PLLUSB_12
50
23 SYSX_OUT
51
24 i.c.[1]
52
 
53
Row C
54
1 KEY_COL2
55
2 KEY_COL3
56
3 U7_RX/PIO_INP[23]
57
4 U5_TX
58
5 SYSCLKEN
59
6 U3_RX/PIO_INP[18]
60
7 U2_RX/PIO_INP[17]
61
8 VSS
62
9 VSS
63
10 VDD_COREFXD12_01
64
11 VDD_RTCCORE12
65
12 VDD_RTC12
66
13 VSS_RTCOSC
67
14 VDD_RTCOSC12
68
15 i.c.[1]
69
16 VSS
70
17 VDD28
71
18 i.c.[1]
72
19 VSS
73
20 VSS_CORE_01
74
21 PLL397_LOOP
75
22 VDD_PLL397_12
76
23 VSS_PLL397
77
24 ADIN0
78
 
79
Row D
80
1 KEY_ROW4
81
2 KEY_COL0
82
3 TEST
83
4 VSS_IO1828_01
84
5 U6_IRTX
85
6 VDD_CORE12_02
86
7 JTAG1_NTRST
87
8 VSS_CORE_02
88
9 U2_TX
89
10 GPI_11
90
11 VSS
91
12 ONSW
92
13 RESET_N
93
14 VDD28
94
15 VSS
95
16 VSS_CORE_03
96
17 VSS
97
18 VDD_COREFXD12_02
98
19 VSS_PLLHCLK
99
20 VDD_OSC12
100
21 i.c.[1]
101
22 VSS_AD
102
23 ADIN2
103
24 VDD_AD28
104
 
105
Row E
106
1 KEY_ROW2
107
2 KEY_ROW5
108
3 VSS_IO28_01
109
4 KEY_COL4
110
21 VDD_AD28
111
22 ADIN1
112
23 RAM_D[30]/PIO_SD[11]
113
24 RAM_D[31]/PIO_SD[12]
114
 
115
Row F
116
1 VSS_IO28_02
117
2 KEY_ROW1
118
3 KEY_ROW3
119
4 KEY_COL1
120
21 RAM_D[29]/PIO_SD[10]
121
22 VDD_SDRAM18_02
122
23 VSS_SDRAM_01
123
24 RAM_D[28]/PIO_SD[09]
124
 
125
Row G
126
1 i.c.[1]
127
2 i.c.[1]
128
3 KEY_ROW0
129
4 VDD_IO28_02
130
21 VDD_SDRAM18_01
131
22 VSS_SDRAM_02
132
23 RAM_D[24]/PIO_SD[05]
133
24 RAM_D[27]/PIO_SD[08]
134
 
135
Row H
136
1 GPI_00
137
2 i.c.[1]
138
3 PWM_OUT2
139
4 i.c.[1]
140
21 RAM_D[19]/PIO_SD[00]
141
22 RAM_D[23]/PIO_SD[04]
142
23 RAM_D[26]/PIO_SD[07]
143
24 RAM_D[21]/PIO_SD[02]
144
 
145
Row J
146
1 GPI_07
147
2 PWM_OUT1
148
3 GPI_02
149
4 VSS_CORE_04
150
21 RAM_D[25]/PIO_SD[06]
151
22 VDD_SDRAM18_03
152
23 VSS_SDRAM_03
153
24 RAM_D[20]/PIO_SD[01]
154
 
155
Row K
156
1 GPI_10/U4_RX
157
2 GPI_08/KEY_COL6/SPI2_BUSY
158
3 GPI_01/SERVICE_N
159
4 GPI_04/SPI1_BUSY
160
21 VDD_CORE12_03
161
22 VDD_SDRAM18_04
162
23 RAM_D[22]/PIO_SD[03]
163
24 RAM_D[18]/DDR_NCLK
164
 
165
Row L
166
1 GPO_03
167
2 GPI_09/KEY_COL7
168
3 VDD_CORE12_05
169
4 GPO_02
170
21 RAM_D[17]/DDR_DQS1
171
22 RAM_D[13]
172
23 RAM_D[16]/DDR_DQS0
173
24 RAM_D[15]
174
 
175
 
176
Row M
177
1 GPO_08
178
2 GPO_10
179
3 GPO_07
180
4 GPO_06
181
21 VSS_SDRAM_04
182
22 RAM_D[10]
183
23 RAM_D[14]
184
24 RAM_D[12]
185
 
186
Row N
187
1 GPO_13
188
2 GPO_16
189
3 VSS_IO28_03
190
4 GPO_09
191
21 RAM_D[07]
192
22 VSS_SDRAM_05
193
23 RAM_D[11]
194
24 RAM_D[09]
195
 
196
Row P
197
1 GPO_18
198
2 GPO_22/U7_HRTS
199
3 GPO_12
200
4 GPO_21/U4_TX
201
21 RAM_D[04]
202
22 VDD_SDRAM18_05
203
23 RAM_D[08]
204
24 RAM_D[06]
205
 
206
Row R
207
1 GPIO_01
208
2 GPIO_05
209
3 VSS_CORE_05
210
4 GPO_15
211
21 VSS_CORE_06
212
22 VSS_SDRAM_06
213
23 RAM_D[05]
214
24 RAM_D[03]
215
 
216
Row T
217
1 GPIO_03/KEY_ROW7
218
2 GPIO_04
219
3 GPIO_00
220
4 SPI2_DATIN
221
21 RAM_CLKIN
222
22 RAM_D[01]
223
23 RAM_D[00]
224
24 RAM_D[02]
225
 
226
Row U
227
1 i.c.[1]
228
2 MS_DIO1
229
3 GPIO_02/KEY_ROW6
230
4 VDD_IO28_01
231
21 RAM_RAS_N
232
22 VDD_SDRAM18_06
233
23 RAM_CLK
234
24 RAM_CKE
235
 
236
Row V
237
1 SPI1_DATIN
238
2 SPI2_DATIO
239
3 SPI2_CLK
240
4 MS_DIO3
241
21 RAM_DQM[2]
242
22 RAM_WR_N
243
23 RAM_CAS_N
244
24 RAM_CS_N
245
 
246
Row W
247
1 SPI1_DATIO
248
2 MS_DIO0
249
3 SPI1_CLK
250
4 VSS
251
21 RAM_A[14]
252
22 VSS_SDRAM_07
253
23 RAM_DQM[1]
254
24 RAM_DQM[3]
255
 
256
Row Y
257
1 MS_BS
258
2 MS_DIO2
259
3 GPO_04
260
4 I2C1_SCL
261
21 VDD_SDRAM18_07
262
22 RAM_A[10]
263
23 RAM_A[12]
264
24 RAM_DQM[0]
265
 
266
Row AA
267
1 MS_SCLK
268
2 VDD_CORE12_01
269
3 GPI_06/HSTIM_CAP
270
4 VDD1828
271
5 VSS_CORE_07
272
6 VSS
273
7 USB_ATX_INT_N
274
8 USB_DAT_VP/U5_RX
275
9 I2C2_SDA
276
10 VSS_CORE_08
277
11 GPI_03
278
12 VDD_CORE12_06
279
13 i.c.[1]
280
14 i.c.[1]
281
15 VDD_IO18_02
282
16 FLASH_ALE
283
17 FLASH_RD_N
284
18 VSS_SDRAM_10
285
19 VDD_IO18_01
286
20 VDD_SDRAM18_09
287
21 RAM_A[05]
288
22 VSS_SDRAM_08
289
23 RAM_A[09]
290
24 RAM_A[13]
291
 
292
Row AB
293
1 GPO_11
294
2 VSS
295
3 TST_CLK2
296
4 VSS
297
5 VSS
298
6 VDD_CORE12_07
299
7 USB_SE0_VM/U5_TX
300
8 VSS_IO18_04
301
9 GPO_00/TST_CLK1
302
10 GPO_05
303
11 VDD_IO18_03
304
12 RESOUT_N
305
13 i.c.[1]
306
14 i.c.[1]
307
15 i.c.[1]
308
16 i.c.[1]
309
17 VSS_CORE_09
310
18 VDD_CORE12_08
311
19 FLASH_IO[04]
312
20 RAM_A[01]
313
21 VSS_SDRAM_09
314
22 RAM_A[07]
315
23 RAM_A[08]
316
24 RAM_A[11]
317
 
318
Row AC
319
1 I2C1_SDA
320
2 VSS
321
3 VSS
322
4 VSS
323
5 VSS
324
6 VSS
325
7 VDD_IO18_04
326
8 USB_I2C_SCL
327
9 GPO_01
328
10 GPO_19
329
11 VSS
330
12 VSS_IO18_03
331
13 i.c.[1]
332
14 i.c.[1]
333
15 FLASH_CLE
334
16 VSS_IO18_01
335
17 FLASH_IO[06]
336
18 FLASH_RDY
337
19 FLASH_IO[02]
338
20 FLASH_IO[03]
339
21 FLASH_CE_N
340
22 RAM_A[04]
341
23 RAM_A[06]
342
24 VDD_SDRAM18_08
343
 
344
Row AD
345
1 VSS
346
2 i.c.[1]
347
3 VSS
348
4 VDD1828
349
5 VSS
350
6 USB_OE_TP_N
351
7 USB_I2C_SDA
352
8 I2C2_SCL
353
9 GPO_14
354
10 GPO_20
355
11 VSS
356
12 i.c.[1]
357
13 i.c.[1]
358
14 i.c.[1]
359
15 VSS_IO18_02
360
16 i.c.[1]
361
17 FLASH_WR_N
362
18 FLASH_IO[07]
363
19 FLASH_IO[05]
364
20 FLASH_IO[01]
365
21 FLASH_IO[00]
366
22 RAM_A[00]
367
23 RAM_A[02]
368
24 RAM_A[03]
369