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42 | TDO - 13 14 - GND |
42 | TDO - 13 14 - GND |
43 | nSRST - 15 16 - GND |
43 | nSRST - 15 16 - GND |
44 | DBGRQ - 17 18 - GND |
44 | DBGRQ - 17 18 - GND |
45 | DBGACK - 19 20 - GND |
45 | DBGACK - 19 20 - GND |
46 | 46 | ||
47 | - | ||
48 | http://www.voti.nl/winkel/catalog.html?CON-LCONTRA-17x2 |
47 | http://www.voti.nl/winkel/catalog.html?CON-LCONTRA-17x2 |
- | 48 | ||
- | 49 | INVERTER, HEX SCHMITT |
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- | 50 | ||
- | 51 | http://www.interfacebus.com/Design_Connector_JTAG_Bus.html |
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- | 52 | page 374 - user.manual.lpc3180.01.pdf |
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- | 53 | Table 418. Debug pins on LPC3180/01 |
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- | 54 | Pin name Description Alternate function I/O type Reset state Pin detail |
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- | 55 | JTAG1_TCK ARM Jtag clock - I Input -[1] |
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- | 56 | JTAG1_RTCK ARM Jtag return clock - O Low - |
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- | 57 | JTAG1_NTRST ARM Jtag reset - I Input pullup[2] |
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- | 58 | JTAG1_TMS ARM Jtag mode select - I Input pullup |
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- | 59 | JTAG1_TDI ARM Jtag data in - I Input pullup |
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- | 60 | JTAG1_TDO ARM Jtag data out - O Low - |
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- | 61 | Total pins: 6 |
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- | 62 | [1] This pin has a pullup on the LPC3180. |
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- | 63 | [2] This pin has a pulldown on the LPC3180. |
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- | 64 | [3] General note: Inputs from JTAG emulators may have strong drivers. It is recommended to add termination resistors on the PCB. |