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   TDO - 13  14 - GND
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   TDO - 13  14 - GND
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 nSRST - 15  16 - GND
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 nSRST - 15  16 - GND
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 DBGRQ - 17  18 - GND
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 DBGRQ - 17  18 - GND
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DBGACK - 19  20 - GND
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DBGACK - 19  20 - GND
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http://www.voti.nl/winkel/catalog.html?CON-LCONTRA-17x2
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http://www.voti.nl/winkel/catalog.html?CON-LCONTRA-17x2
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INVERTER, HEX SCHMITT
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http://www.interfacebus.com/Design_Connector_JTAG_Bus.html
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page 374 - user.manual.lpc3180.01.pdf
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Table 418. Debug pins on LPC3180/01
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Pin name        Description                 Alternate function      I/O type        Reset state         Pin detail
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JTAG1_TCK       ARM Jtag clock              -                       I               Input                -[1]
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JTAG1_RTCK      ARM Jtag return clock       -                       O               Low                  -
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JTAG1_NTRST     ARM Jtag reset              -                       I               Input                pullup[2]
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JTAG1_TMS       ARM Jtag mode select        -                       I               Input                pullup
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JTAG1_TDI       ARM Jtag data in            -                       I               Input                pullup
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JTAG1_TDO       ARM Jtag data out           -                       O               Low                  -
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Total pins: 6
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[1]   This pin has a pullup on the LPC3180.
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[2]   This pin has a pulldown on the LPC3180.
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[3]   General note: Inputs from JTAG emulators may have strong drivers. It is recommended to add termination resistors on the PCB.