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Rev 241 Rev 299
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v 20080127 1
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v 20080127 1
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C 40000 40000 0 0 0 title-bordered-A2.sym
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C 40000 40000 0 0 0 title-bordered-A3.sym
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T 56100 40900 8 10 1 1 0 0 1
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T 49300 40900 8 10 1 1 0 0 1
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data=2008-10-28
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data=2008-10-28
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T 60000 40600 8 10 1 1 0 0 1
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T 53200 40600 8 10 1 1 0 0 1
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rev=v0.1.1j
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rev=v0.1.2j
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T 56100 40600 8 10 1 1 0 0 1
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T 49300 40600 8 10 1 1 0 0 1
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fname=../openarm/spi.sch
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fname=../openarm/spi.sch
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T 59000 41150 8 10 1 1 0 0 1
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T 52200 41150 8 10 1 1 0 0 1
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auth=Jelle de Jong <jelledejong@powercraft.nl>
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auth=Jelle de Jong <jelledejong@powercraft.nl>
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T 56100 40300 8 10 1 1 0 0 1
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T 49300 40300 8 10 1 1 0 0 1
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page=14
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page=14
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T 57600 40300 8 10 1 1 0 0 1
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T 50800 40300 8 10 1 1 0 0 1
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pages=20
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pages=14
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T 55600 41150 8 10 1 1 0 0 1
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T 48800 41150 8 10 1 1 0 0 1
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tiltle=OpenARM SBC SPI Design
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tiltle=OpenARM SBC SPI Design
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T 59000 41400 8 10 1 1 0 0 1
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T 52200 41400 8 10 1 1 0 0 1
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company=PowerCraft Technology
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company=PowerCraft Technology
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T 59000 40900 8 10 1 1 0 0 1
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T 52200 40900 8 10 1 1 0 0 1
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licence=GPLv3
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licence=GPLv3
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T 60050 40300 8 10 1 1 0 0 1
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T 53250 40300 8 10 1 1 0 0 1
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project=OpenARM SBC Project
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project=OpenARM SBC Project
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C 48500 48800 1 0 0 LPC3180-SPI.sym
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C 46700 45200 1 0 0 LPC3180-SPI.sym
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{
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{
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T 51600 50700 5 10 1 1 0 6 1
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T 49800 47100 5 10 1 1 0 6 1
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block=SPI
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block=SPI
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T 48800 50700 5 10 1 1 0 0 1
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T 47000 47100 5 10 1 1 0 0 1
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device=LPC3180FEL320
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device=LPC3180FEL320
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T 48800 50900 5 10 1 1 0 0 1
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T 47000 47300 5 10 1 1 0 0 1
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footprint=SOT824
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footprint=SOT824-1
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T 48800 51100 5 10 1 1 0 0 1
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T 47000 47500 5 10 1 1 0 0 1
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refdes=U1401
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refdes=U1401
- 
 
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T 46700 45200 5 10 0 0 0 0 1
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description=MCU 32BIT ARM9 LOW POWER, SMD
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}
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}
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C 48300 50400 1 180 0 output-2.sym
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C 46500 46800 1 180 0 output-2.sym
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{
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{
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T 47400 50200 5 10 0 0 180 0 1
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T 45600 46600 5 10 0 0 180 0 1
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net=CAN0_SI:1
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net=CAN0_SI:1
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T 47400 50300 5 10 1 1 180 1 1
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T 45600 46700 5 10 1 1 180 1 1
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value=CAN0_SI
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value=CAN0_SI
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}
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}
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C 48300 49500 1 180 0 output-2.sym
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C 46500 45900 1 180 0 output-2.sym
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{
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{
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T 47400 49300 5 10 0 0 180 0 1
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T 45600 45700 5 10 0 0 180 0 1
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net=CAN0_SCK:1
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net=CAN0_SCK:1
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T 47400 49400 5 10 1 1 180 1 1
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T 45600 45800 5 10 1 1 180 1 1
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value=CAN0_SCK
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value=CAN0_SCK
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}
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}
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C 46900 49900 1 0 0 input-2.sym
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C 45100 46300 1 0 0 input-2.sym
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{
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{
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T 47800 50100 5 10 0 0 0 0 1
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T 46000 46500 5 10 0 0 0 0 1
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net=CAN0_SO:1
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net=CAN0_SO:1
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T 47400 50000 5 10 1 1 0 7 1
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T 45600 46400 5 10 1 1 0 7 1
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value=CAN0_SO
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value=CAN0_SO
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}
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}
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N 48500 49400 48300 49400 4
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N 46700 45800 46500 45800 4
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N 48500 50000 48300 50000 4
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N 46700 46400 46500 46400 4
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N 48500 50300 48300 50300 4
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N 46700 46700 46500 46700 4
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C 52100 49300 1 0 0 output-2.sym
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C 50300 45700 1 0 0 output-2.sym
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{
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{
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T 53000 49500 5 10 0 0 0 0 1
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T 51200 45900 5 10 0 0 0 0 1
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net=ETH0_SCK:1
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net=ETH0_SCK:1
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T 53000 49400 5 10 1 1 0 1 1
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T 51200 45800 5 10 1 1 0 1 1
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value=ETH0_SCK
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value=ETH0_SCK
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}
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}
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C 53500 50100 1 180 0 input-2.sym
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C 51700 46500 1 180 0 input-2.sym
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{
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{
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T 52600 49900 5 10 0 0 180 0 1
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T 50800 46300 5 10 0 0 180 0 1
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net=ETH0_SO:1
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net=ETH0_SO:1
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T 53000 50000 5 10 1 1 180 7 1
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T 51200 46400 5 10 1 1 180 7 1
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value=ETH0_SO
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value=ETH0_SO
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}
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}
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C 52100 50200 1 0 0 output-2.sym
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C 50300 46600 1 0 0 output-2.sym
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{
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{
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T 53000 50400 5 10 0 0 0 0 1
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T 51200 46800 5 10 0 0 0 0 1
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net=CAN0_SI:1
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net=CAN0_SI:1
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T 53000 50300 5 10 1 1 0 1 1
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T 51200 46700 5 10 1 1 0 1 1
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value=ETH0_SI
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value=ETH0_SI
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}
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}
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N 52100 49400 51900 49400 4
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N 50300 45800 50100 45800 4
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N 52100 50000 51900 50000 4
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N 50300 46400 50100 46400 4
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N 52100 50300 51900 50300 4
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N 50300 46700 50100 46700 4