Rev 146 | Show entire file | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed
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| Line 1... | Line 1... | ||
| 1 | v 20060123 1 |
1 | v 20060123 1 |
| 2 | B 300 300 2800 1800 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 |
2 | B 300 300 2800 1500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 |
| 3 | T 3100 2200 9 10 0 0 0 0 1 |
3 | T 3100 1900 9 10 0 0 0 0 1 |
| 4 | uselicense=unlimited |
4 | uselicense=unlimited |
| 5 | T 3100 2400 9 10 0 0 0 0 1 |
5 | T 3100 2100 9 10 0 0 0 0 1 |
| 6 | distlicense=GPL (v2 or any later version) |
6 | distlicense=GPL (v2 or any later version) |
| 7 | T 3100 2600 9 10 0 0 0 0 1 |
7 | T 3100 2300 9 10 0 0 0 0 1 |
| 8 | copyright=2008 Tibor Palinkas |
8 | copyright=2008 Tibor Palinkas |
| 9 | T 3100 2800 9 10 0 0 0 0 1 |
9 | T 3100 2500 9 10 0 0 0 0 1 |
| 10 | author=Tibor Palinkas |
10 | author=Tibor Palinkas |
| 11 | T 3100 3000 9 10 0 0 0 0 1 |
11 | T 3100 2700 9 10 0 0 0 0 1 |
| 12 | description=NXP 16/32-bit ARM926EJ-S microcontroller |
12 | description=NXP 16/32-bit ARM926EJ-S microcontroller |
| 13 | T 3100 3200 9 10 0 0 0 0 1 |
13 | T 3100 2900 9 10 0 0 0 0 1 |
| 14 | documentation=http://www.standardics.nxp.com/support/documents/microcontrollers/pdf/user.manual.lpc3180.01.pdf |
14 | documentation=http://www.standardics.nxp.com/support/documents/microcontrollers/pdf/user.manual.lpc3180.01.pdf |
| 15 | T 3100 2200 5 10 1 1 0 6 1 |
15 | T 3100 1900 5 10 1 1 0 6 1 |
| 16 | block=SPI |
16 | block=SPI |
| 17 | T 300 2200 5 10 1 1 0 0 1 |
17 | T 300 1900 5 10 1 1 0 0 1 |
| 18 | device=LPC3180FEL320 |
18 | device=LPC3180FEL320 |
| 19 | T 300 2400 5 10 1 1 0 0 1 |
19 | T 300 2100 5 10 1 1 0 0 1 |
| 20 | footprint=SOT824 |
20 | footprint=SOT824 |
| 21 | T 300 2600 5 10 1 1 0 0 1 |
21 | T 300 2300 5 10 1 1 0 0 1 |
| 22 | refdes=U? |
22 | refdes=U? |
| 23 | P 0 900 300 900 1 0 0 |
23 | P 0 600 300 600 1 0 0 |
| 24 | {
|
24 | {
|
| 25 | T 350 900 9 10 1 1 0 1 1 |
25 | T 350 600 9 10 1 1 0 1 1 |
| 26 | pinlabel=SPI1_CLK |
26 | pinlabel=SPI1_CLK |
| 27 | T 200 950 5 8 1 1 0 6 1 |
27 | T 200 650 5 8 1 1 0 6 1 |
| 28 | pinnumber=W3 |
28 | pinnumber=W3 |
| 29 | T 200 950 5 8 0 1 0 6 1 |
29 | T 200 650 5 8 0 1 0 6 1 |
| 30 | pinseq=W3 |
30 | pinseq=W3 |
| 31 | } |
31 | } |
| 32 | P 3400 900 3100 900 1 0 0 |
32 | P 3400 600 3100 600 1 0 0 |
| 33 | {
|
33 | {
|
| 34 | T 3050 900 9 10 1 1 0 7 1 |
34 | T 3050 600 9 10 1 1 0 7 1 |
| 35 | pinlabel=SPI2_CLK |
35 | pinlabel=SPI2_CLK |
| 36 | T 3200 950 5 8 1 1 0 0 1 |
36 | T 3200 650 5 8 1 1 0 0 1 |
| 37 | pinnumber=V3 |
37 | pinnumber=V3 |
| 38 | T 3200 950 5 8 0 1 0 0 1 |
38 | T 3200 650 5 8 0 1 0 0 1 |
| 39 | pinseq=V3 |
39 | pinseq=V3 |
| 40 | } |
40 | } |
| 41 | P 3400 1800 3100 1800 1 0 0 |
41 | P 3400 1500 3100 1500 1 0 0 |
| 42 | {
|
42 | {
|
| 43 | T 3050 1800 9 10 1 1 0 7 1 |
43 | T 3050 1500 9 10 1 1 0 7 1 |
| 44 | pinlabel=SPI2_DATIO |
44 | pinlabel=SPI2_DATIO |
| 45 | T 3200 1850 5 8 1 1 0 0 1 |
45 | T 3200 1550 5 8 1 1 0 0 1 |
| 46 | pinnumber=V2 |
46 | pinnumber=V2 |
| 47 | T 3200 1850 5 8 0 1 0 0 1 |
47 | T 3200 1550 5 8 0 1 0 0 1 |
| 48 | pinseq=V2 |
48 | pinseq=V2 |
| 49 | } |
49 | } |
| 50 | P 0 1800 300 1800 1 0 0 |
50 | P 0 1500 300 1500 1 0 0 |
| 51 | {
|
51 | {
|
| 52 | T 350 1800 9 10 1 1 0 1 1 |
52 | T 350 1500 9 10 1 1 0 1 1 |
| 53 | pinlabel=SPI1_DATIO |
53 | pinlabel=SPI1_DATIO |
| 54 | T 200 1850 5 8 1 1 0 6 1 |
54 | T 200 1550 5 8 1 1 0 6 1 |
| 55 | pinnumber=W1 |
55 | pinnumber=W1 |
| 56 | T 200 1850 5 8 0 1 0 6 1 |
56 | T 200 1550 5 8 0 1 0 6 1 |
| 57 | pinseq=W1 |
57 | pinseq=W1 |
| 58 | } |
58 | } |
| 59 | P 3400 1500 3100 1500 1 0 0 |
59 | P 3400 1200 3100 1200 1 0 0 |
| 60 | {
|
60 | {
|
| 61 | T 3050 1500 9 10 1 1 0 7 1 |
61 | T 3050 1200 9 10 1 1 0 7 1 |
| 62 | pinlabel=SPI2_DATIN |
62 | pinlabel=SPI2_DATIN |
| 63 | T 3200 1550 5 8 1 1 0 0 1 |
63 | T 3200 1250 5 8 1 1 0 0 1 |
| 64 | pinnumber=T4 |
64 | pinnumber=T4 |
| 65 | T 3200 1550 5 8 0 1 0 0 1 |
65 | T 3200 1250 5 8 0 1 0 0 1 |
| 66 | pinseq=T4 |
66 | pinseq=T4 |
| 67 | } |
67 | } |
| 68 | P 0 1500 300 1500 1 0 0 |
68 | P 0 1200 300 1200 1 0 0 |
| 69 | {
|
69 | {
|
| 70 | T 350 1500 9 10 1 1 0 1 1 |
70 | T 350 1200 9 10 1 1 0 1 1 |
| 71 | pinlabel=SPI1_DATIN |
71 | pinlabel=SPI1_DATIN |
| 72 | T 200 1550 5 8 1 1 0 6 1 |
72 | T 200 1250 5 8 1 1 0 6 1 |
| 73 | pinnumber=V1 |
73 | pinnumber=V1 |
| 74 | T 200 1550 5 8 0 1 0 6 1 |
74 | T 200 1250 5 8 0 1 0 6 1 |
| 75 | pinseq=V1 |
75 | pinseq=V1 |
| 76 | } |
76 | } |
| 77 | P 0 600 300 600 1 0 0 |
- | |
| 78 | {
|
- | |
| 79 | T 350 600 9 10 1 1 0 1 1 |
- | |
| 80 | pinlabel=GPI_04/SPI1_BUSY |
- | |
| 81 | T 200 650 5 8 1 1 0 6 1 |
- | |
| 82 | pinnumber=K4 |
- | |
| 83 | T 200 650 5 8 0 1 0 6 1 |
- | |
| 84 | pinseq=K4 |
- | |
| 85 | } |
- | |