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1 | v 20060123 1 |
1 | v 20060123 1 |
2 | B 300 300 5400 2400 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 |
2 | B 400 300 5400 2400 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 |
3 | T 5700 2800 9 10 0 0 0 0 1 |
3 | T 5700 2800 9 10 0 0 0 0 1 |
4 | uselicense=unlimited |
4 | uselicense=unlimited |
5 | T 5700 3000 9 10 0 0 0 0 1 |
5 | T 5700 3000 9 10 0 0 0 0 1 |
6 | distlicense=GPL (v2 or any later version) |
6 | distlicense=GPL (v2 or any later version) |
7 | T 5700 3200 9 10 0 0 0 0 1 |
7 | T 5700 3200 9 10 0 0 0 0 1 |
Line 10... | Line 10... | ||
10 | author=Tibor Palinkas |
10 | author=Tibor Palinkas |
11 | T 5700 3600 9 10 0 0 0 0 1 |
11 | T 5700 3600 9 10 0 0 0 0 1 |
12 | description=NXP 16/32-bit ARM926EJ-S microcontroller |
12 | description=NXP 16/32-bit ARM926EJ-S microcontroller |
13 | T 5700 3800 9 10 0 0 0 0 1 |
13 | T 5700 3800 9 10 0 0 0 0 1 |
14 | documentation=http://www.standardics.nxp.com/support/documents/microcontrollers/pdf/user.manual.lpc3180.01.pdf |
14 | documentation=http://www.standardics.nxp.com/support/documents/microcontrollers/pdf/user.manual.lpc3180.01.pdf |
15 | T 300 2800 5 10 1 1 0 0 1 |
15 | T 5800 2800 5 10 1 1 0 6 1 |
16 | block=U |
16 | block=U |
17 | T 300 3000 5 10 1 1 0 0 1 |
17 | T 400 2800 5 10 1 1 0 0 1 |
18 | device=LPC3180FEL320 |
18 | device=LPC3180FEL320 |
19 | T 300 3200 5 10 1 1 0 0 1 |
19 | T 400 3000 5 10 1 1 0 0 1 |
20 | footprint=SOT824 |
20 | footprint=SOT824 |
21 | T 300 3400 5 10 1 1 0 0 1 |
21 | T 400 3200 5 10 1 1 0 0 1 |
22 | refdes=U? |
22 | refdes=U? |
23 | P 0 2100 300 2100 1 0 0 |
23 | P 0 2100 400 2100 1 0 0 |
24 | { |
24 | { |
25 | T 350 2100 9 10 1 1 0 1 1 |
25 | T 450 2100 9 10 1 1 0 1 1 |
26 | pinlabel=U1_TX |
26 | pinlabel=U1_TX |
27 | T 200 2150 5 8 1 1 0 6 1 |
27 | T 300 2150 5 8 1 1 0 6 1 |
28 | pinnumber=B10 |
28 | pinnumber=B10 |
29 | T 200 2150 5 8 0 1 0 6 1 |
29 | T 300 2150 5 8 0 1 0 6 1 |
30 | pinseq=B10 |
30 | pinseq=B10 |
31 | } |
31 | } |
32 | P 3200 3000 3200 2700 1 0 0 |
32 | P 3300 3000 3300 2700 1 0 0 |
33 | { |
33 | { |
34 | T 3200 2650 9 10 1 1 0 5 1 |
34 | T 3300 2650 9 10 1 1 0 5 1 |
35 | pinlabel=U6_IRRX |
35 | pinlabel=U6_IRRX |
36 | T 3250 2750 5 8 1 1 0 0 1 |
36 | T 3350 2750 5 8 1 1 0 0 1 |
37 | pinnumber=A1 |
37 | pinnumber=A1 |
38 | T 3250 2750 5 8 0 1 0 0 1 |
38 | T 3350 2750 5 8 0 1 0 0 1 |
39 | pinseq=A1 |
39 | pinseq=A1 |
40 | } |
40 | } |
41 | P 6000 1500 5700 1500 1 0 0 |
41 | P 6200 1500 5800 1500 1 0 0 |
42 | { |
42 | { |
43 | T 5650 1500 9 10 1 1 0 7 1 |
43 | T 5750 1500 9 10 1 1 0 7 1 |
44 | pinlabel=GPO_22/U7_HRTS |
44 | pinlabel=GPO_22/U7_HRTS |
45 | T 5800 1550 5 8 1 1 0 0 1 |
45 | T 5900 1550 5 8 1 1 0 0 1 |
46 | pinnumber=P2 |
46 | pinnumber=P2 |
47 | T 5800 1550 5 8 0 1 0 0 1 |
47 | T 5900 1550 5 8 0 1 0 0 1 |
48 | pinseq=P2 |
48 | pinseq=P2 |
49 | } |
49 | } |
50 | P 1400 3000 1400 2700 1 0 0 |
50 | P 1500 3000 1500 2700 1 0 0 |
51 | { |
51 | { |
52 | T 1400 2650 9 10 1 1 0 5 1 |
52 | T 1500 2650 9 10 1 1 0 5 1 |
53 | pinlabel=U5_RX |
53 | pinlabel=U5_RX |
54 | T 1450 2750 5 8 1 1 0 0 1 |
54 | T 1550 2750 5 8 1 1 0 0 1 |
55 | pinnumber=A2 |
55 | pinnumber=A2 |
56 | T 1450 2750 5 8 0 1 0 0 1 |
56 | T 1550 2750 5 8 0 1 0 0 1 |
57 | pinseq=A2 |
57 | pinseq=A2 |
58 | } |
58 | } |
59 | P 0 600 300 600 1 0 0 |
59 | P 0 600 400 600 1 0 0 |
60 | { |
60 | { |
61 | T 350 600 9 10 1 1 0 1 1 |
61 | T 450 600 9 10 1 1 0 1 1 |
62 | pinlabel=GPO_23/U2_HRTS |
62 | pinlabel=GPO_23/U2_HRTS |
63 | T 200 650 5 8 1 1 0 6 1 |
63 | T 300 650 5 8 1 1 0 6 1 |
64 | pinnumber=A11 |
64 | pinnumber=A11 |
65 | T 200 650 5 8 0 1 0 6 1 |
65 | T 300 650 5 8 0 1 0 6 1 |
66 | pinseq=A11 |
66 | pinseq=A11 |
67 | } |
67 | } |
68 | P 4400 3000 4400 2700 1 0 0 |
68 | P 4500 3000 4500 2700 1 0 0 |
69 | { |
69 | { |
70 | T 4400 2650 9 10 1 1 0 5 1 |
70 | T 4500 2650 9 10 1 1 0 5 1 |
71 | pinlabel=U6_IRTX |
71 | pinlabel=U6_IRTX |
72 | T 4450 2750 5 8 1 1 0 0 1 |
72 | T 4550 2750 5 8 1 1 0 0 1 |
73 | pinnumber=D5 |
73 | pinnumber=D5 |
74 | T 4450 2750 5 8 0 1 0 0 1 |
74 | T 4550 2750 5 8 0 1 0 0 1 |
75 | pinseq=D5 |
75 | pinseq=D5 |
76 | } |
76 | } |
77 | P 6000 2400 5700 2400 1 0 0 |
77 | P 6200 2400 5800 2400 1 0 0 |
78 | { |
78 | { |
79 | T 5650 2400 9 10 1 1 0 7 1 |
79 | T 5750 2400 9 10 1 1 0 7 1 |
80 | pinlabel=U7_HCTS |
80 | pinlabel=U7_HCTS |
81 | T 5800 2450 5 8 1 1 0 0 1 |
81 | T 5900 2450 5 8 1 1 0 0 1 |
82 | pinnumber=B2 |
82 | pinnumber=B2 |
83 | T 5800 2450 5 8 0 1 0 0 1 |
83 | T 5900 2450 5 8 0 1 0 0 1 |
84 | pinseq=B2 |
84 | pinseq=B2 |
85 | } |
85 | } |
86 | P 0 1500 300 1500 1 0 0 |
86 | P 0 1500 400 1500 1 0 0 |
87 | { |
87 | { |
88 | T 350 1500 9 10 1 1 0 1 1 |
88 | T 450 1500 9 10 1 1 0 1 1 |
89 | pinlabel=U2_HCTS |
89 | pinlabel=U2_HCTS |
90 | T 200 1550 5 8 1 1 0 6 1 |
90 | T 300 1550 5 8 1 1 0 6 1 |
91 | pinnumber=B8 |
91 | pinnumber=B8 |
92 | T 200 1550 5 8 0 1 0 6 1 |
92 | T 300 1550 5 8 0 1 0 6 1 |
93 | pinseq=B8 |
93 | pinseq=B8 |
94 | } |
94 | } |
95 | P 1600 0 1600 300 1 0 0 |
95 | P 1700 0 1700 300 1 0 0 |
96 | { |
96 | { |
97 | T 1600 350 9 10 1 1 0 3 1 |
97 | T 1700 350 9 10 1 1 0 3 1 |
98 | pinlabel=U3_TX |
98 | pinlabel=U3_TX |
99 | T 1650 250 5 8 1 1 0 2 1 |
99 | T 1750 250 5 8 1 1 0 2 1 |
100 | pinnumber=A7 |
100 | pinnumber=A7 |
101 | T 1650 250 5 8 0 1 0 2 1 |
101 | T 1750 250 5 8 0 1 0 2 1 |
102 | pinseq=A7 |
102 | pinseq=A7 |
103 | } |
103 | } |
104 | P 800 0 800 300 1 0 0 |
104 | P 900 0 900 300 1 0 0 |
105 | { |
105 | { |
106 | T 800 350 9 10 1 1 0 3 1 |
106 | T 900 350 9 10 1 1 0 3 1 |
107 | pinlabel=U3_RX |
107 | pinlabel=U3_RX |
108 | T 850 250 5 8 1 1 0 2 1 |
108 | T 950 250 5 8 1 1 0 2 1 |
109 | pinnumber=C6 |
109 | pinnumber=C6 |
110 | T 850 250 5 8 0 1 0 2 1 |
110 | T 950 250 5 8 0 1 0 2 1 |
111 | pinseq=C6 |
111 | pinseq=C6 |
112 | } |
112 | } |
113 | P 0 900 300 900 1 0 0 |
113 | P 0 900 400 900 1 0 0 |
114 | { |
114 | { |
115 | T 350 900 9 10 1 1 0 1 1 |
115 | T 450 900 9 10 1 1 0 1 1 |
116 | pinlabel=U2_TX |
116 | pinlabel=U2_TX |
117 | T 200 950 5 8 1 1 0 6 1 |
117 | T 300 950 5 8 1 1 0 6 1 |
118 | pinnumber=D9 |
118 | pinnumber=D9 |
119 | T 200 950 5 8 0 1 0 6 1 |
119 | T 300 950 5 8 0 1 0 6 1 |
120 | pinseq=D9 |
120 | pinseq=D9 |
121 | } |
121 | } |
122 | P 0 1200 300 1200 1 0 0 |
122 | P 0 1200 400 1200 1 0 0 |
123 | { |
123 | { |
124 | T 350 1200 9 10 1 1 0 1 1 |
124 | T 450 1200 9 10 1 1 0 1 1 |
125 | pinlabel=U2_RX |
125 | pinlabel=U2_RX |
126 | T 200 1250 5 8 1 1 0 6 1 |
126 | T 300 1250 5 8 1 1 0 6 1 |
127 | pinnumber=C7 |
127 | pinnumber=C7 |
128 | T 200 1250 5 8 0 1 0 6 1 |
128 | T 300 1250 5 8 0 1 0 6 1 |
129 | pinseq=C7 |
129 | pinseq=C7 |
130 | } |
130 | } |
131 | P 2200 3000 2200 2700 1 0 0 |
131 | P 2300 3000 2300 2700 1 0 0 |
132 | { |
132 | { |
133 | T 2200 2650 9 10 1 1 0 5 1 |
133 | T 2300 2650 9 10 1 1 0 5 1 |
134 | pinlabel=U5_TX |
134 | pinlabel=U5_TX |
135 | T 2250 2750 5 8 1 1 0 0 1 |
135 | T 2350 2750 5 8 1 1 0 0 1 |
136 | pinnumber=C4 |
136 | pinnumber=C4 |
137 | T 2250 2750 5 8 0 1 0 0 1 |
137 | T 2350 2750 5 8 0 1 0 0 1 |
138 | pinseq=C4 |
138 | pinseq=C4 |
139 | } |
139 | } |
140 | P 0 2400 300 2400 1 0 0 |
140 | P 0 2400 400 2400 1 0 0 |
141 | { |
141 | { |
142 | T 350 2400 9 10 1 1 0 1 1 |
142 | T 450 2400 9 10 1 1 0 1 1 |
143 | pinlabel=U1_RX |
143 | pinlabel=U1_RX |
144 | T 200 2450 5 8 1 1 0 6 1 |
144 | T 300 2450 5 8 1 1 0 6 1 |
145 | pinnumber=B9 |
145 | pinnumber=B9 |
146 | T 200 2450 5 8 0 1 0 6 1 |
146 | T 300 2450 5 8 0 1 0 6 1 |
147 | pinseq=B9 |
147 | pinseq=B9 |
148 | } |
148 | } |
149 | P 6000 1800 5700 1800 1 0 0 |
149 | P 6200 1800 5800 1800 1 0 0 |
150 | { |
150 | { |
151 | T 5650 1800 9 10 1 1 0 7 1 |
151 | T 5750 1800 9 10 1 1 0 7 1 |
152 | pinlabel=U7_RX |
152 | pinlabel=U7_RX |
153 | T 5800 1850 5 8 1 1 0 0 1 |
153 | T 5900 1850 5 8 1 1 0 0 1 |
154 | pinnumber=C3 |
154 | pinnumber=C3 |
155 | T 5800 1850 5 8 0 1 0 0 1 |
155 | T 5900 1850 5 8 0 1 0 0 1 |
156 | pinseq=C3 |
156 | pinseq=C3 |
157 | } |
157 | } |
158 | P 6000 2100 5700 2100 1 0 0 |
158 | P 6200 2100 5800 2100 1 0 0 |
159 | { |
159 | { |
160 | T 5650 2100 9 10 1 1 0 7 1 |
160 | T 5750 2100 9 10 1 1 0 7 1 |
161 | pinlabel=U7_TX |
161 | pinlabel=U7_TX |
162 | T 5800 2150 5 8 1 1 0 0 1 |
162 | T 5900 2150 5 8 1 1 0 0 1 |
163 | pinnumber=B3 |
163 | pinnumber=B3 |
164 | T 5800 2150 5 8 0 1 0 0 1 |
164 | T 5900 2150 5 8 0 1 0 0 1 |
165 | pinseq=B3 |
165 | pinseq=B3 |
166 | } |
166 | } |
167 | P 2900 0 2900 300 1 0 0 |
167 | P 3000 0 3000 300 1 0 0 |
168 | { |
168 | { |
169 | T 2900 350 9 10 1 1 0 3 1 |
169 | T 3000 350 9 10 1 1 0 3 1 |
170 | pinlabel=GPI_10/U4_RX |
170 | pinlabel=GPI_10/U4_RX |
171 | T 2950 250 5 8 1 1 0 2 1 |
171 | T 3050 250 5 8 1 1 0 2 1 |
172 | pinnumber=K1 |
172 | pinnumber=K1 |
173 | T 2950 250 5 8 0 1 0 2 1 |
173 | T 3050 250 5 8 0 1 0 2 1 |
174 | pinseq=K1 |
174 | pinseq=K1 |
175 | } |
175 | } |
176 | P 4700 0 4700 300 1 0 0 |
176 | P 4800 0 4800 300 1 0 0 |
177 | { |
177 | { |
178 | T 4700 350 9 10 1 1 0 3 1 |
178 | T 4800 350 9 10 1 1 0 3 1 |
179 | pinlabel=GPO_21/U4_TX |
179 | pinlabel=GPO_21/U4_TX |
180 | T 4750 250 5 8 1 1 0 2 1 |
180 | T 4850 250 5 8 1 1 0 2 1 |
181 | pinnumber=P4 |
181 | pinnumber=P4 |
182 | T 4750 250 5 8 0 1 0 2 1 |
182 | T 4850 250 5 8 0 1 0 2 1 |
183 | pinseq=P4 |
183 | pinseq=P4 |
184 | } |
184 | } |