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Rev 138 Rev 146
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v 20060123 1
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v 20060123 1
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B 300 300 1800 3600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
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B 500 300 1800 3600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
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T 2100 4000 9 10 0 0 0 0 1
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T 2100 4000 9 10 0 0 0 0 1
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uselicense=unlimited
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uselicense=unlimited
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T 2100 4200 9 10 0 0 0 0 1
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T 2100 4200 9 10 0 0 0 0 1
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distlicense=GPL (v2 or any later version)
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distlicense=GPL (v2 or any later version)
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T 2100 4400 9 10 0 0 0 0 1
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author=Tibor Palinkas
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author=Tibor Palinkas
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T 2100 4800 9 10 0 0 0 0 1
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T 2100 4800 9 10 0 0 0 0 1
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description=NXP 16/32-bit ARM926EJ-S microcontroller
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description=NXP 16/32-bit ARM926EJ-S microcontroller
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T 2100 5000 9 10 0 0 0 0 1
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T 2100 5000 9 10 0 0 0 0 1
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documentation=http://www.standardics.nxp.com/support/documents/microcontrollers/pdf/user.manual.lpc3180.01.pdf
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documentation=http://www.standardics.nxp.com/support/documents/microcontrollers/pdf/user.manual.lpc3180.01.pdf
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T 300 4000 5 10 1 1 0 0 1
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T 2300 4000 5 10 1 1 0 6 1
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block=VSS (RAM)
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block=VSS (RAM)
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T 300 4200 5 10 1 1 0 0 1
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T 500 4000 5 10 1 1 0 0 1
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device=LPC3180FEL320
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device=LPC3180FEL320
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T 300 4400 5 10 1 1 0 0 1
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T 500 4200 5 10 1 1 0 0 1
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footprint=SOT824
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footprint=SOT824
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T 300 4600 5 10 1 1 0 0 1
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T 500 4400 5 10 1 1 0 0 1
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refdes=U?
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refdes=U?
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P 0 900 300 900 1 0 0
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P 0 900 500 900 1 0 0
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{
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{
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T 350 900 9 10 1 1 0 1 1
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T 550 900 9 10 1 1 0 1 1
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pinlabel=VSS_RAM
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pinlabel=VSS_RAM
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T 200 950 5 8 1 1 0 6 1
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T 400 950 5 8 1 1 0 6 1
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pinnumber=R22
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pinnumber=R22
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T 200 950 5 8 0 1 0 6 1
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T 400 950 5 8 0 1 0 6 1
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pinseq=R22
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pinseq=R22
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}
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}
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P 0 2400 300 2400 1 0 0
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P 0 2400 500 2400 1 0 0
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{
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{
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T 350 2400 9 10 1 1 0 1 1
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T 550 2400 9 10 1 1 0 1 1
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pinlabel=VSS_RAM
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pinlabel=VSS_RAM
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T 200 2450 5 8 1 1 0 6 1
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T 400 2450 5 8 1 1 0 6 1
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pinnumber=F23
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pinnumber=F23
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T 200 2450 5 8 0 1 0 6 1
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T 400 2450 5 8 0 1 0 6 1
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pinseq=F23
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pinseq=F23
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}
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}
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P 0 1200 300 1200 1 0 0
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P 0 1200 500 1200 1 0 0
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{
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{
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T 350 1200 9 10 1 1 0 1 1
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T 550 1200 9 10 1 1 0 1 1
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pinlabel=VSS_RAM
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pinlabel=VSS_RAM
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T 200 1250 5 8 1 1 0 6 1
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T 400 1250 5 8 1 1 0 6 1
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pinnumber=N22
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pinnumber=N22
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T 200 1250 5 8 0 1 0 6 1
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T 400 1250 5 8 0 1 0 6 1
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pinseq=N22
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pinseq=N22
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}
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}
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P 0 2700 300 2700 1 0 0
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P 0 2700 500 2700 1 0 0
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{
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{
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T 350 2700 9 10 1 1 0 1 1
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T 550 2700 9 10 1 1 0 1 1
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pinlabel=VSS_RAM
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pinlabel=VSS_RAM
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T 200 2750 5 8 1 1 0 6 1
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T 400 2750 5 8 1 1 0 6 1
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pinnumber=C19
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pinnumber=C19
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T 200 2750 5 8 0 1 0 6 1
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T 400 2750 5 8 0 1 0 6 1
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pinseq=C19
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pinseq=C19
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}
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}
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P 0 3300 300 3300 1 0 0
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P 0 3300 500 3300 1 0 0
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{
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{
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T 350 3300 9 10 1 1 0 1 1
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T 550 3300 9 10 1 1 0 1 1
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pinlabel=VSS_RAM
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pinlabel=VSS_RAM
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T 200 3350 5 8 1 1 0 6 1
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T 400 3350 5 8 1 1 0 6 1
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pinnumber=AA22
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pinnumber=AA22
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T 200 3350 5 8 0 1 0 6 1
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T 400 3350 5 8 0 1 0 6 1
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pinseq=AA22
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pinseq=AA22
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}
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}
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P 0 2100 300 2100 1 0 0
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P 0 2100 500 2100 1 0 0
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{
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{
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T 350 2100 9 10 1 1 0 1 1
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T 550 2100 9 10 1 1 0 1 1
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pinlabel=VSS_RAM
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pinlabel=VSS_RAM
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T 200 2150 5 8 1 1 0 6 1
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T 400 2150 5 8 1 1 0 6 1
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pinnumber=G22
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pinnumber=G22
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T 200 2150 5 8 0 1 0 6 1
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T 400 2150 5 8 0 1 0 6 1
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pinseq=G22
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pinseq=G22
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}
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}
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P 0 3600 300 3600 1 0 0
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P 0 3600 500 3600 1 0 0
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{
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{
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T 350 3600 9 10 1 1 0 1 1
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T 550 3600 9 10 1 1 0 1 1
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pinlabel=VSS_RAM
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pinlabel=VSS_RAM
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T 200 3650 5 8 1 1 0 6 1
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T 400 3650 5 8 1 1 0 6 1
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pinnumber=AB21
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pinnumber=AB21
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T 200 3650 5 8 0 1 0 6 1
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T 400 3650 5 8 0 1 0 6 1
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pinseq=AB21
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pinseq=AB21
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}
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}
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P 0 3000 300 3000 1 0 0
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P 0 3000 500 3000 1 0 0
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{
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{
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T 350 3000 9 10 1 1 0 1 1
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T 550 3000 9 10 1 1 0 1 1
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pinlabel=VSS_RAM
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pinlabel=VSS_RAM
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T 200 3050 5 8 1 1 0 6 1
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T 400 3050 5 8 1 1 0 6 1
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pinnumber=AD11
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pinnumber=AD11
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T 200 3050 5 8 0 1 0 6 1
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T 400 3050 5 8 0 1 0 6 1
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pinseq=AD11
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pinseq=AD11
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}
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}
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P 0 600 300 600 1 0 0
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P 0 600 500 600 1 0 0
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{
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{
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T 350 600 9 10 1 1 0 1 1
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T 550 600 9 10 1 1 0 1 1
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pinlabel=VSS_RAM
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pinlabel=VSS_RAM
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T 200 650 5 8 1 1 0 6 1
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T 400 650 5 8 1 1 0 6 1
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pinnumber=W22
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pinnumber=W22
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T 200 650 5 8 0 1 0 6 1
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T 400 650 5 8 0 1 0 6 1
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pinseq=W22
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pinseq=W22
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}
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}
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P 0 1500 500 1500 1 0 0
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{
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{
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T 350 1500 9 10 1 1 0 1 1
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T 550 1500 9 10 1 1 0 1 1
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pinlabel=VSS_RAM
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pinlabel=VSS_RAM
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T 200 1550 5 8 1 1 0 6 1
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T 400 1550 5 8 1 1 0 6 1
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pinnumber=M21
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pinnumber=M21
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T 200 1550 5 8 0 1 0 6 1
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T 400 1550 5 8 0 1 0 6 1
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pinseq=M21
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pinseq=M21
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}
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}
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P 0 1800 300 1800 1 0 0
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P 0 1800 500 1800 1 0 0
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{
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{
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T 350 1800 9 10 1 1 0 1 1
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T 550 1800 9 10 1 1 0 1 1
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pinlabel=VSS_RAM
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pinlabel=VSS_RAM
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T 200 1850 5 8 1 1 0 6 1
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T 400 1850 5 8 1 1 0 6 1
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pinnumber=J23
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pinnumber=J23
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T 200 1850 5 8 0 1 0 6 1
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T 400 1850 5 8 0 1 0 6 1
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pinseq=J23
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pinseq=J23
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}
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}