Subversion Repositories OpenARM Single-board Computer

v 20080127 1
C 40000 40000 0 0 0 title-bordered-A3.sym
C 43900 44100 1 0 0 header20-2.sym
{
T 44200 48200 5 10 1 1 0 0 1
device=JTAG_HEADER
T 44200 48400 5 10 1 1 0 0 1
refdes=J301
T 43900 44100 5 10 0 0 0 0 1
footprint=HEADER20_2
}
C 45500 43600 1 0 0 gnd-1.sym
N 45300 47500 45600 47500 4
N 45600 47500 45600 43900 4
N 45300 47100 45600 47100 4
N 45300 46700 45600 46700 4
N 45300 46300 45600 46300 4
N 45300 45900 45600 45900 4
N 45300 45500 45600 45500 4
N 45300 45100 45600 45100 4
N 45300 44700 45600 44700 4
N 45300 44300 45600 44300 4
C 46100 49000 1 0 0 generic-power.sym
{
T 46300 49250 5 10 1 1 0 3 1
net=+3.125V:1
}
C 50100 47800 1 0 0 resistor-2.sym
{
T 50500 48150 5 10 0 0 0 0 1
device=RESISTOR
T 50300 48100 5 10 1 1 0 0 1
refdes=R302
T 50300 47700 5 10 1 1 0 2 1
value=100
T 50100 47800 5 10 0 1 0 0 1
footprint=0805
}
C 41500 50400 1 0 0 input-1.sym
{
T 41500 50400 5 10 0 0 0 0 1
net=+3.125V:1
T 41400 50500 5 10 1 1 0 7 1
value=+3.125V
}
C 43100 47600 1 180 0 output-1.sym
{
T 43100 47600 5 10 0 0 180 0 1
net=nTRST:1
T 42200 47500 5 10 1 1 180 1 1
value=\_TRST\_
}
C 43100 47200 1 180 0 output-1.sym
{
T 43100 47200 5 10 0 0 180 0 1
net=TDI:1
T 42200 47100 5 10 1 1 180 1 1
value=TDI
}
C 43100 46800 1 180 0 output-1.sym
{
T 43100 46800 5 10 0 0 180 0 1
net=TMS:1
T 42200 46700 5 10 1 1 180 1 1
value=TMS
}
C 43100 46400 1 180 0 output-1.sym
{
T 43100 46400 5 10 0 0 180 0 1
net=TCK:1
T 42200 46300 5 10 1 1 180 1 1
value=TCK
}
C 49700 46400 1 180 0 output-1.sym
{
T 49700 46400 5 10 0 0 180 0 1
net=RTCK:1
T 48800 46300 5 10 1 1 180 1 1
value=RTCK
}
C 49700 48000 1 180 0 output-1.sym
{
T 49700 48000 5 10 0 0 180 0 1
net=TDO:1
T 48800 47900 5 10 1 1 180 1 1
value=TDO
}
C 43100 45200 1 180 0 output-1.sym
{
T 43100 45200 5 10 0 0 180 0 1
net=nSRST:1
T 42200 45100 5 10 1 1 180 1 1
value=\_SRST\_
}
N 43900 44700 43100 44700 4
{
T 43400 44800 5 10 1 1 0 0 1
value=N.C.
}
N 43900 44300 43100 44300 4
{
T 43400 44400 5 10 1 1 0 0 1
value=N.C.
}
C 42300 50700 1 0 0 generic-power.sym
{
T 42500 50950 5 10 1 1 0 3 1
net=+3.125V:1
}
N 42300 50500 42500 50500 4
N 42500 50500 42500 50700 4
N 43100 45100 43900 45100 4
{
T 43400 45200 5 10 1 1 0 0 1
value=\_SRST\_
}
N 43900 45500 43100 45500 4
{
T 43400 45600 5 10 1 1 0 0 1
value=TDO
}
C 50100 44600 1 0 0 resistor-2.sym
{
T 50500 44950 5 10 0 0 0 0 1
device=RESISTOR
T 50300 44900 5 10 1 1 0 0 1
refdes=R306
T 50300 44500 5 10 1 1 0 2 1
value=100
T 50100 44600 5 10 0 1 0 0 1
footprint=0805
}
C 50100 45400 1 0 0 resistor-2.sym
{
T 50500 45750 5 10 0 0 0 0 1
device=RESISTOR
T 50300 45700 5 10 1 1 0 0 1
refdes=R305
T 50300 45300 5 10 1 1 0 2 1
value=100
T 50100 45400 5 10 0 1 0 0 1
footprint=0805
}
C 50100 46200 1 0 0 resistor-2.sym
{
T 50500 46550 5 10 0 0 0 0 1
device=RESISTOR
T 50300 46500 5 10 1 1 0 0 1
refdes=R304
T 50300 46100 5 10 1 1 0 2 1
value=100
T 50100 46200 5 10 0 1 0 0 1
footprint=0805
}
C 50100 47000 1 0 0 resistor-2.sym
{
T 50500 47350 5 10 0 0 0 0 1
device=RESISTOR
T 50300 47300 5 10 1 1 0 0 1
refdes=R303
T 50300 46900 5 10 1 1 0 2 1
value=100
T 50100 47000 5 10 0 1 0 0 1
footprint=0805
}
N 43900 47900 43100 47900 4
{
T 43400 48000 5 10 1 1 0 0 1
value=VTref
}
C 46500 46700 1 90 0 capacitor-1.sym
{
T 45800 46900 5 10 0 0 90 0 1
device=CAPACITOR
T 46000 46900 5 10 1 1 90 0 1
refdes=C301
T 45600 46900 5 10 0 0 90 0 1
symversion=0.1
T 46500 46700 5 10 0 0 90 0 1
footprint=0805
T 46600 46900 5 10 1 1 90 2 1
value=100nF
}
N 46300 47600 46300 49000 4
C 46200 46200 1 0 0 gnd-1.sym
N 46300 46700 46300 46500 4
N 46300 48700 43100 48700 4
N 43100 47900 43100 48700 4
N 45300 47900 46300 47900 4
{
T 45400 48000 5 10 1 1 0 0 1
value=Vsupply
}
N 43900 47500 43100 47500 4
{
T 43400 47600 5 10 1 1 0 0 1
value=\_TRST\_
}
N 43900 47100 43100 47100 4
{
T 43400 47200 5 10 1 1 0 0 1
value=TDI
}
N 43900 46700 43100 46700 4
{
T 43400 46800 5 10 1 1 0 0 1
value=TMS
}
N 43900 46300 43100 46300 4
{
T 43400 46400 5 10 1 1 0 0 1
value=TCK
}
N 43900 45900 43100 45900 4
{
T 43400 46000 5 10 1 1 0 0 1
value=RTCK
}
N 51700 46650 51500 46650 4
N 51500 46650 51500 47900 4
N 51500 47900 51000 47900 4
N 51700 46350 51350 46350 4
N 51350 46350 51350 47100 4
N 51350 47100 51000 47100 4
N 51700 45750 51200 45750 4
N 51200 45750 51200 45500 4
N 51200 45500 51000 45500 4
N 51700 46050 51200 46050 4
N 51200 46050 51200 46300 4
N 51200 46300 51000 46300 4
N 51700 45450 51350 45450 4
N 51350 45450 51350 44700 4
N 51350 44700 51000 44700 4
C 50100 43800 1 0 0 resistor-2.sym
{
T 50500 44150 5 10 0 0 0 0 1
device=RESISTOR
T 50300 44100 5 10 1 1 0 0 1
refdes=R307
T 50300 43700 5 10 1 1 0 2 1
value=100
T 50100 43800 5 10 0 1 0 0 1
footprint=0805
}
N 51700 45150 51500 45150 4
N 51500 43900 51500 45150 4
N 51500 43900 51000 43900 4
C 48900 44000 1 180 1 input-1.sym
{
T 48900 44000 5 10 0 0 180 6 1
net=nTRST:1
T 48800 43900 5 10 1 1 180 1 1
value=\_TRST\_
}
C 48900 44800 1 180 1 input-1.sym
{
T 48900 44800 5 10 0 0 180 6 1
net=TDI:1
T 48800 44700 5 10 1 1 180 1 1
value=TDI
}
C 48900 47200 1 180 1 input-1.sym
{
T 48900 47200 5 10 0 0 180 6 1
net=TMS:1
T 48800 47100 5 10 1 1 180 1 1
value=TMS
}
C 48900 45600 1 180 1 input-1.sym
{
T 48900 45600 5 10 0 0 180 6 1
net=TCK:1
T 48800 45500 5 10 1 1 180 1 1
value=TCK
}
C 42300 46000 1 180 1 input-1.sym
{
T 42300 46000 5 10 0 0 180 6 1
net=RTCK:1
T 42200 45900 5 10 1 1 180 1 1
value=RTCK
}
C 42300 45600 1 180 1 input-1.sym
{
T 42300 45600 5 10 0 0 180 6 1
net=TDO:1
T 42200 45500 5 10 1 1 180 1 1
value=TDO
}
C 42400 42900 1 180 1 input-1.sym
{
T 42400 42900 5 10 0 0 180 6 1
net=nSRST:1
T 42300 42800 5 10 1 1 180 1 1
value=\_SRST\_
}
N 50100 43900 49700 43900 4
N 50100 44700 49700 44700 4
N 50100 46300 49700 46300 4
N 49700 45500 50100 45500 4
N 50100 47100 49700 47100 4
N 50100 47900 49700 47900 4
C 44500 42700 1 0 0 output-1.sym
{
T 44500 42700 5 10 0 0 0 0 1
net=nonbuf_nRSTB:1
T 45400 42800 5 10 1 1 0 1 1
value=\_nonbuf_RSTB\_
}
C 43400 42700 1 0 0 resistor-2.sym
{
T 43800 43050 5 10 0 0 0 0 1
device=RESISTOR
T 43600 43000 5 10 1 1 0 0 1
refdes=R301
T 43600 42600 5 10 1 1 0 2 1
value=100
T 43400 42700 5 10 0 1 0 0 1
footprint=0805
}
N 43400 42800 43200 42800 4
N 44300 42800 44500 42800 4
T 48700 41600 8 10 1 0 0 0 2
source=/home/jelle/openarm/doc/JTAG/information.txt

C 51700 44550 1 0 0 LPC3180-JTAG.sym
{
T 53800 47050 5 10 1 1 0 6 1
block=JTAG
T 52000 47050 5 10 1 1 0 0 1
device=LPC3180FEL320
T 52000 47250 5 10 1 1 0 0 1
footprint=SOT824
T 52000 47450 5 10 1 1 0 0 1
refdes=U301
}